Kconfig:16:config MTD_DEBUG
Kconfig:23:config MTD_DEBUG_VERBOSE
Kconfig:25:	depends on MTD_DEBUG
Kconfig:30:config MTD_PARTITIONS
Kconfig:43:config MTD_CONCAT
Kconfig:52:config MTD_REDBOOT_PARTS
Kconfig:54:	depends on MTD_PARTITIONS
Kconfig:68:	  SA1100 map driver (CONFIG_MTD_SA1100) has an option for this, for 
Kconfig:71:config MTD_REDBOOT_PARTS_UNALLOCATED
Kconfig:73:	depends on MTD_REDBOOT_PARTS
Kconfig:78:config MTD_REDBOOT_PARTS_READONLY
Kconfig:80:	depends on MTD_REDBOOT_PARTS
Kconfig:85:config MTD_CMDLINE_PARTS
Kconfig:87:	depends on MTD_PARTITIONS = "y"
Kconfig:95:	  SA1100 map driver (CONFIG_MTD_SA1100) has an option for this, for 
Kconfig:122:config MTD_AFS_PARTS
Kconfig:124:	depends on ARM && MTD_PARTITIONS
Kconfig:136:	  'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
Kconfig:141:config MTD_CHAR
Kconfig:150:config MTD_BLOCK
Kconfig:172:config MTD_BLOCK_RO
Kconfig:174:	depends on MTD_BLOCK!=y && MTD
Makefile:8:mtd-$(CONFIG_MTD_PARTITIONS)	+= mtdpart.o
Makefile:11:obj-$(CONFIG_MTD_CONCAT)	+= mtdconcat.o
Makefile:12:obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
Makefile:13:obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
Makefile:14:obj-$(CONFIG_MTD_AFS_PARTS)	+= afs.o
Makefile:17:obj-$(CONFIG_MTD_CHAR)		+= mtdchar.o
Makefile:18:obj-$(CONFIG_MTD_BLOCK)		+= mtdblock.o mtd_blkdevs.o
Makefile:19:obj-$(CONFIG_MTD_BLOCK_RO)	+= mtdblock_ro.o mtd_blkdevs.o
chips/cfi_cmdset_0002.c:273:	mtd->type = MTD_NORFLASH;
chips/cfi_cmdset_0002.c:325:		DEBUG(MTD_DEBUG_LEVEL1, "Using buffer write method\n" );
chips/cfi_cmdset_0002.c:328:		DEBUG(MTD_DEBUG_LEVEL1, "Using word write method\n" );
chips/cfi_cmdset_0002.c:360:	mtd->flags = MTD_CAP_NORFLASH;
chips/cfi_cmdset_0002.c:717:	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
chips/cfi_cmdset_0002.c:728:		DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): NOP\n",
chips/cfi_cmdset_0002.c:979:	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
chips/cfi_cmdset_0002.c:1162:	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
chips/cfi_cmdset_0002.c:1341:	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
chips/cfi_cmdset_0002.c:1422:	instr->state = MTD_ERASE_DONE;
chips/cfi_cmdset_0002.c:1445:	instr->state = MTD_ERASE_DONE;
chips/cfi_cmdset_0002.c:1681:	DEBUG(MTD_DEBUG_LEVEL3,
chips/cfi_cmdset_0002.c:1689:	DEBUG(MTD_DEBUG_LEVEL3,
chips/cfi_cmdset_0002.c:1705:	DEBUG(MTD_DEBUG_LEVEL3,
chips/cfi_cmdset_0002.c:1713:	DEBUG(MTD_DEBUG_LEVEL3,
chips/cfi_cmdset_0001.c:249:	mtd->type = MTD_NORFLASH;
chips/cfi_cmdset_0001.c:314:	mtd->flags = MTD_CAP_NORFLASH;
chips/cfi_cmdset_0001.c:1557:	instr->state = MTD_ERASE_DONE;
chips/cfi_cmdset_0020.c:175:	mtd->type = MTD_NORFLASH;
chips/cfi_cmdset_0020.c:230:	mtd->flags = MTD_CAP_NORFLASH;
chips/cfi_cmdset_0020.c:231:	mtd->flags |= MTD_ECC; /* FIXME: Not all STMicro flashes have this */
chips/cfi_cmdset_0020.c:968:	instr->state = MTD_ERASE_DONE;
chips/gen_probe.c:231:#ifdef CONFIG_MTD_CFI_INTELEXT
chips/gen_probe.c:236:#ifdef CONFIG_MTD_CFI_AMDSTD
chips/gen_probe.c:240:#ifdef CONFIG_MTD_CFI_STAA
chips/jedec.c:48:		.capabilities	= MTD_CAP_NORFLASH
chips/jedec.c:55:		.capabilities	= MTD_CAP_NORFLASH
chips/jedec.c:62:		.capabilities	= MTD_CAP_NORFLASH
chips/jedec.c:69:		.capabilities	= MTD_CAP_NORFLASH
chips/jedec.c:76:		.capabilities	= MTD_CAP_NORFLASH
chips/jedec.c:83:		.capabilities	= MTD_CAP_NORFLASH
chips/jedec.c:256:   MTD->type = MTD_NORFLASH;
chips/jedec.c:257:   MTD->flags = MTD_CAP_NORFLASH;
chips/jedec.c:782:   instr->state = MTD_ERASE_DONE;
chips/sharp.c:135:	mtd->type = MTD_NORFLASH;
chips/sharp.c:142:	mtd->flags = MTD_CAP_NORFLASH;
chips/sharp.c:427:	instr->state = MTD_ERASE_DONE;
chips/amd_flash.c:751:	mtd->type = MTD_NORFLASH;
chips/amd_flash.c:752:	mtd->flags = MTD_CAP_NORFLASH;
chips/amd_flash.c:1309:	instr->state = MTD_ERASE_DONE;
chips/map_ram.c:67:	mtd->type = MTD_RAM;
chips/map_ram.c:73:	mtd->flags = MTD_CAP_RAM | MTD_VOLATILE;
chips/map_ram.c:115:	instr->state = MTD_ERASE_DONE;
chips/map_rom.c:43:	mtd->type = MTD_ROM;
chips/map_rom.c:48:	mtd->flags = MTD_CAP_ROM;
chips/Makefile:14:obj-$(CONFIG_MTD_AMDSTD)	+= amd_flash.o 
chips/Makefile:15:obj-$(CONFIG_MTD_CFI)		+= cfi_probe.o
chips/Makefile:16:obj-$(CONFIG_MTD_CFI_UTIL)	+= cfi_util.o
chips/Makefile:17:obj-$(CONFIG_MTD_CFI_STAA)	+= cfi_cmdset_0020.o
chips/Makefile:18:obj-$(CONFIG_MTD_CFI_AMDSTD)	+= cfi_cmdset_0002.o
chips/Makefile:19:obj-$(CONFIG_MTD_CFI_INTELEXT)	+= cfi_cmdset_0001.o
chips/Makefile:20:obj-$(CONFIG_MTD_GEN_PROBE)	+= gen_probe.o
chips/Makefile:21:obj-$(CONFIG_MTD_JEDEC)		+= jedec.o
chips/Makefile:22:obj-$(CONFIG_MTD_JEDECPROBE)	+= jedec_probe.o
chips/Makefile:23:obj-$(CONFIG_MTD_RAM)		+= map_ram.o
chips/Makefile:24:obj-$(CONFIG_MTD_ROM)		+= map_rom.o
chips/Makefile:25:obj-$(CONFIG_MTD_SHARP)		+= sharp.o
chips/Makefile:26:obj-$(CONFIG_MTD_ABSENT)	+= map_absent.o
chips/jedec_probe.c:166: * Intel command sets use the MTD_UADDR_UNNECESSARY.
chips/jedec_probe.c:167: * Each identifier, except MTD_UADDR_UNNECESSARY, and
chips/jedec_probe.c:168: * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
chips/jedec_probe.c:169: * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
chips/jedec_probe.c:174:	MTD_UADDR_NOT_SUPPORTED = 0,	/* data width not supported */
chips/jedec_probe.c:175:	MTD_UADDR_0x0555_0x02AA,
chips/jedec_probe.c:176:	MTD_UADDR_0x0555_0x0AAA,
chips/jedec_probe.c:177:	MTD_UADDR_0x5555_0x2AAA,
chips/jedec_probe.c:178:	MTD_UADDR_0x0AAA_0x0555,
chips/jedec_probe.c:179:	MTD_UADDR_DONT_CARE,		/* Requires an arbitrary address */
chips/jedec_probe.c:180:	MTD_UADDR_UNNECESSARY,		/* Does not require any address */
chips/jedec_probe.c:192: * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
chips/jedec_probe.c:197: * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
chips/jedec_probe.c:201:	[MTD_UADDR_NOT_SUPPORTED] = {
chips/jedec_probe.c:206:	[MTD_UADDR_0x0555_0x02AA] = {
chips/jedec_probe.c:211:	[MTD_UADDR_0x0555_0x0AAA] = {
chips/jedec_probe.c:216:	[MTD_UADDR_0x5555_0x2AAA] = {
chips/jedec_probe.c:221:	[MTD_UADDR_0x0AAA_0x0555] = {
chips/jedec_probe.c:226:	[MTD_UADDR_DONT_CARE] = {
chips/jedec_probe.c:267:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:283:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:299:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:312:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:313:			[1] = MTD_UADDR_0x0555_0x02AA   /* x16 */
chips/jedec_probe.c:329:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:330:			[1] = MTD_UADDR_0x0555_0x02AA   /* x16 */
chips/jedec_probe.c:346:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:347:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:363:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:364:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:380:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:381:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:398:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:399:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:417:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:418:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:436:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:437:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:453:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:454:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:470:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:471:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:487:			[0] = MTD_UADDR_DONT_CARE     /* x8 */
chips/jedec_probe.c:500:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:513:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:526:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:539:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:563:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:576:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:590:			[0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
chips/jedec_probe.c:591:			[1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
chips/jedec_probe.c:605:			[0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
chips/jedec_probe.c:606:			[1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
chips/jedec_probe.c:620:			[0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
chips/jedec_probe.c:621:			[1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
chips/jedec_probe.c:635:			[0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
chips/jedec_probe.c:636:			[1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
chips/jedec_probe.c:650:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:663:			[0] = MTD_UADDR_DONT_CARE     /* x16 */
chips/jedec_probe.c:676:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:677:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:691:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:692:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:706:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:707:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:723:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:724:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:740:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:741:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:757:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:758:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:774:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:775:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:791:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:792:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:819:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:833:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:847:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:848:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:862:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:863:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:877:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:891:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:905:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:918:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:931:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:944:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:958:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:972:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:986:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:999:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:1013:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:1027:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:1041:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:1055:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:1069:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:1083:			[1] = MTD_UADDR_UNNECESSARY,    /* x16 */
chips/jedec_probe.c:1097:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:1110:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:1123:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:1124:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:1140:			[0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
chips/jedec_probe.c:1141:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:1157:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:1170:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:1186:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:1213:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1226:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1239:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1252:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1265:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1278:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1290:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1302:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1315:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1328:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1341:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1354:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1367:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1380:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1393:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1406:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1419:			[0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
chips/jedec_probe.c:1420:			[1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
chips/jedec_probe.c:1436:			[0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
chips/jedec_probe.c:1437:			[1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
chips/jedec_probe.c:1453:			[0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
chips/jedec_probe.c:1454:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:1470:			[0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
chips/jedec_probe.c:1471:			[1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
chips/jedec_probe.c:1487:			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
chips/jedec_probe.c:1500:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:1513:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:1526:			[0] = MTD_UADDR_UNNECESSARY,    /* x8 */
chips/jedec_probe.c:1539:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:1540:			[1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
chips/jedec_probe.c:1556:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:1557:			[1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
chips/jedec_probe.c:1573:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:1574:			[1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
chips/jedec_probe.c:1588:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:1589:			[1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
chips/jedec_probe.c:1603:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:1604:			[1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
chips/jedec_probe.c:1618:			[0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
chips/jedec_probe.c:1619:			[1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
chips/jedec_probe.c:1633:			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
chips/jedec_probe.c:1708:	__u8 uaddr = MTD_UADDR_NOT_SUPPORTED;
chips/jedec_probe.c:1722:	if (uaddr != MTD_UADDR_NOT_SUPPORTED ) {
chips/jedec_probe.c:1766:	if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
chips/jedec_probe.c:1830:	DEBUG( MTD_DEBUG_LEVEL3,
chips/jedec_probe.c:1834:		DEBUG( MTD_DEBUG_LEVEL3,
chips/jedec_probe.c:1842:	if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
chips/jedec_probe.c:1848:	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
chips/jedec_probe.c:1850:	if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
chips/jedec_probe.c:1853:		DEBUG( MTD_DEBUG_LEVEL3,
chips/jedec_probe.c:1870:	DEBUG( MTD_DEBUG_LEVEL3,
chips/jedec_probe.c:1877:		DEBUG( MTD_DEBUG_LEVEL3,
chips/jedec_probe.c:1891:	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
chips/jedec_probe.c:1908:	enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
chips/jedec_probe.c:1916:		if (MTD_UADDR_UNNECESSARY == uaddr_idx)
chips/jedec_probe.c:1964:		DEBUG(MTD_DEBUG_LEVEL3,
chips/jedec_probe.c:1969:				DEBUG( MTD_DEBUG_LEVEL3,
chips/map_absent.c:60:	mtd->type 	= MTD_ABSENT;
chips/Kconfig:7:config MTD_CFI
chips/Kconfig:18:config MTD_JEDECPROBE
chips/Kconfig:30:config MTD_GEN_PROBE
chips/Kconfig:32:	default m if MTD_CFI!=y && !MTD_INTELPROBE && MTD_JEDECPROBE!=y && (MTD_CFI=m || MTD_JEDECPROBE=m)
chips/Kconfig:33:	default y if MTD_CFI=y || MTD_INTELPROBE || MTD_JEDECPROBE=y
chips/Kconfig:35:config MTD_CFI_ADV_OPTIONS
chips/Kconfig:37:	depends on MTD_GEN_PROBE
chips/Kconfig:49:	depends on MTD_CFI_ADV_OPTIONS
chips/Kconfig:50:	default MTD_CFI_NOSWAP
chips/Kconfig:52:config MTD_CFI_NOSWAP
chips/Kconfig:57:	  'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
chips/Kconfig:70:config MTD_CFI_BE_BYTE_SWAP
chips/Kconfig:73:config MTD_CFI_LE_BYTE_SWAP
chips/Kconfig:78:config MTD_CFI_GEOMETRY
chips/Kconfig:80:	depends on MTD_CFI_ADV_OPTIONS
chips/Kconfig:88:config MTD_MAP_BANK_WIDTH_1
chips/Kconfig:89:	bool "Support  8-bit buswidth" if MTD_CFI_GEOMETRY
chips/Kconfig:95:config MTD_MAP_BANK_WIDTH_2
chips/Kconfig:96:	bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
chips/Kconfig:102:config MTD_MAP_BANK_WIDTH_4
chips/Kconfig:103:	bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
chips/Kconfig:109:config MTD_MAP_BANK_WIDTH_8
chips/Kconfig:110:	bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
chips/Kconfig:116:config MTD_MAP_BANK_WIDTH_16
chips/Kconfig:117:	bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
chips/Kconfig:123:config MTD_MAP_BANK_WIDTH_32
chips/Kconfig:124:	bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
chips/Kconfig:130:config MTD_CFI_I1
chips/Kconfig:131:	bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
chips/Kconfig:137:config MTD_CFI_I2
chips/Kconfig:138:	bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
chips/Kconfig:144:config MTD_CFI_I4
chips/Kconfig:145:	bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
chips/Kconfig:151:config MTD_CFI_I8
chips/Kconfig:152:	bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
chips/Kconfig:158:config MTD_CFI_INTELEXT
chips/Kconfig:160:	depends on MTD_GEN_PROBE
chips/Kconfig:167:config MTD_CFI_AMDSTD
chips/Kconfig:169:	depends on MTD_GEN_PROBE
chips/Kconfig:176:config MTD_CFI_AMDSTD_RETRY
chips/Kconfig:178:	depends on MTD_CFI_AMDSTD
chips/Kconfig:188:config MTD_CFI_AMDSTD_RETRY_MAX
chips/Kconfig:190:	depends on MTD_CFI_AMDSTD_RETRY
chips/Kconfig:197:config MTD_CFI_STAA
chips/Kconfig:199:	depends on MTD_GEN_PROBE
chips/Kconfig:205:config MTD_CFI_UTIL
chips/Kconfig:207:	default y if MTD_CFI_INTELEXT=y || MTD_CFI_AMDSTD=y || MTD_CFI_STAA=y
chips/Kconfig:208:	default m if MTD_CFI_INTELEXT=m || MTD_CFI_AMDSTD=m || MTD_CFI_STAA=m
chips/Kconfig:210:config MTD_RAM
chips/Kconfig:217:config MTD_ROM
chips/Kconfig:224:config MTD_ABSENT
chips/Kconfig:235:config MTD_OBSOLETE_CHIPS
chips/Kconfig:247:config MTD_AMDSTD
chips/Kconfig:249:	depends on MTD && MTD_OBSOLETE_CHIPS
chips/Kconfig:253:	  cannot be used with the CONFIG_MTD_CFI_AMDSTD option.
chips/Kconfig:257:config MTD_SHARP
chips/Kconfig:259:	depends on MTD && MTD_OBSOLETE_CHIPS
chips/Kconfig:263:	  cannot be used with the CONFIG_MTD_CFI_INTELxxx options.
chips/Kconfig:265:config MTD_JEDEC
chips/Kconfig:267:	depends on MTD && MTD_OBSOLETE_CHIPS
cmdlinepart.c:141:		mask_flags |= MTD_WRITEABLE;
devices/blkmtd.c:41:#define CONFIG_MTD_BLKDEV_ERASESIZE (128 << 10)	/* 128KiB */
devices/blkmtd.c:398:	instr->state = MTD_ERASING;
devices/blkmtd.c:421:		instr->state = MTD_ERASE_FAILED;
devices/blkmtd.c:425:	if(instr->state != MTD_ERASE_FAILED) {
devices/blkmtd.c:431:			instr->state = MTD_ERASE_FAILED;
devices/blkmtd.c:433:			instr->state = MTD_ERASE_DONE;
devices/blkmtd.c:580:		erase_size = CONFIG_MTD_BLKDEV_ERASESIZE;
devices/blkmtd.c:650:	if(MAJOR(bdev->bd_dev) == MTD_BLOCK_MAJOR) {
devices/blkmtd.c:688:		dev->mtd_info.type = MTD_ROM;
devices/blkmtd.c:689:		dev->mtd_info.flags = MTD_CAP_ROM;
devices/blkmtd.c:691:		dev->mtd_info.type = MTD_RAM;
devices/blkmtd.c:692:		dev->mtd_info.flags = MTD_CAP_RAM;
devices/phram.c:56:	instr->state = MTD_ERASE_DONE;
devices/phram.c:147:	new->mtdinfo->flags = MTD_CAP_RAM | MTD_ERASEABLE | MTD_VOLATILE;
devices/phram.c:154:	new->mtdinfo->type = MTD_RAM;
devices/mtdram.c:51:  DEBUG(MTD_DEBUG_LEVEL2, "ram_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
devices/mtdram.c:53:    DEBUG(MTD_DEBUG_LEVEL1, "ram_erase() out of bounds (%ld > %ld)\n", (long)(instr->addr + instr->len), (long)mtd->size);
devices/mtdram.c:59:  instr->state = MTD_ERASE_DONE;
devices/mtdram.c:78:  DEBUG(MTD_DEBUG_LEVEL2, "ram_unpoint\n");
devices/mtdram.c:84:  DEBUG(MTD_DEBUG_LEVEL2, "ram_read(pos:%ld, len:%ld)\n", (long)from, (long)len);
devices/mtdram.c:86:    DEBUG(MTD_DEBUG_LEVEL1, "ram_read() out of bounds (%ld > %ld)\n", (long)(from + len), (long)mtd->size);
devices/mtdram.c:99:  DEBUG(MTD_DEBUG_LEVEL2, "ram_write(pos:%ld, len:%ld)\n", (long)to, (long)len);
devices/mtdram.c:101:    DEBUG(MTD_DEBUG_LEVEL1, "ram_write() out of bounds (%ld > %ld)\n", (long)(to + len), (long)mtd->size);
devices/mtdram.c:134:   mtd->type = MTD_RAM;
devices/mtdram.c:135:   mtd->flags = MTD_CAP_RAM;
devices/mtdram.c:167:    DEBUG(MTD_DEBUG_LEVEL1, 
devices/mtdram.c:200:    DEBUG(MTD_DEBUG_LEVEL1, 
devices/pmc551.c:123:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:131:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:152:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:167:	instr->state = MTD_ERASE_DONE;
devices/pmc551.c:168:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:183:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:188:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:212:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:227:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:235:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:257:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:273:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:290:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:297:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:319:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:335:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:356:#ifdef CONFIG_MTD_PMC551_BUGFIX
devices/pmc551.c:417:#ifndef CONFIG_MTD_PMC551_BUGFIX
devices/pmc551.c:462:#endif /* CONFIG_MTD_PMC551_BUGFIX */
devices/pmc551.c:551:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:642:#if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
devices/pmc551.c:643:static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
devices/pmc551.c:680:        for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
devices/pmc551.c:754:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:766:#ifdef CONFIG_MTD_PMC551_DEBUG
devices/pmc551.c:772:                mtd->flags 	= MTD_CAP_RAM;
devices/pmc551.c:778:                mtd->type 	= MTD_RAM;
devices/slram.c:99:	instr->state = MTD_ERASE_DONE;
devices/slram.c:190:	(*curmtd)->mtdinfo->flags = MTD_CLEAR_BITS | MTD_SET_BITS |
devices/slram.c:191:					MTD_WRITEB_WRITEABLE | MTD_VOLATILE;
devices/slram.c:198:	(*curmtd)->mtdinfo->type = MTD_RAM;
devices/ms02-nv.c:221:	mtd->type = MTD_RAM;
devices/ms02-nv.c:222:	mtd->flags = MTD_CAP_RAM | MTD_XIP;
devices/doc2001.c:69:	DEBUG(MTD_DEBUG_LEVEL3,
devices/doc2001.c:77:		DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
devices/doc2001.c:363:	mtd->type = MTD_NANDFLASH;
devices/doc2001.c:364:	mtd->flags = MTD_CAP_NANDFLASH;
devices/doc2001.c:365:	mtd->ecctype = MTD_ECC_RS_DiskOnChip;
devices/doc2001.c:819:	instr->state = MTD_ERASE_PENDING;
devices/doc2001.c:830:	instr->state = MTD_ERASING;
devices/doc2001.c:843:		instr->state = MTD_ERASE_FAILED;
devices/doc2001.c:845:		instr->state = MTD_ERASE_DONE;
devices/doc1000.c:129:	instr->state = MTD_ERASE_PENDING;
devices/doc1000.c:172:		if (priv->devstat[device] == MTD_ERASING)
devices/doc1000.c:175:			priv->devstat[device] = MTD_ERASE_SUSPEND;
devices/doc1000.c:195:	if (priv->devstat[device] & MTD_ERASE_SUSPEND)
devices/doc1000.c:198:		priv->devstat[device]=MTD_ERASING;
devices/doc1000.c:445:	if (erase->state == MTD_ERASE_PENDING)
devices/doc1000.c:448:		priv->devstat[erase->dev] = erase->state = MTD_ERASING;
devices/doc1000.c:452:	else if (erase->state == MTD_ERASING)
devices/doc1000.c:463:			erase->state = MTD_ERASE_DONE;
devices/doc1000.c:476:				erase->state = MTD_ERASE_FAILED;
devices/doc1000.c:483:				priv->devstat[erase->dev] = erase->state = MTD_ERASE_PENDING;
devices/doc1000.c:494:			erase->state = MTD_ERASE_FAILED;
devices/doc1000.c:554:	mymtd->flags = MTD_CLEAR_BITS | MTD_ERASEABLE;
devices/doc1000.c:565:	mymtd->type = MTD_NORFLASH;
devices/lart.c:425:			 instr->state = MTD_ERASE_FAILED;
devices/lart.c:435:   instr->state = MTD_ERASE_DONE;
devices/lart.c:638:   mtd.type = MTD_NORFLASH;
devices/lart.c:639:   mtd.flags = MTD_CAP_NORFLASH;
devices/docprobe.c:59:#ifndef CONFIG_MTD_DOCPROBE_ADDRESS
devices/docprobe.c:60:#define CONFIG_MTD_DOCPROBE_ADDRESS 0
devices/docprobe.c:64:static unsigned long doc_config_location = CONFIG_MTD_DOCPROBE_ADDRESS;
devices/docprobe.c:70:#ifdef CONFIG_MTD_DOCPROBE_HIGH
devices/docprobe.c:76:#else /*  CONFIG_MTD_DOCPROBE_HIGH */
devices/docprobe.c:82:#endif /*  CONFIG_MTD_DOCPROBE_HIGH */
devices/docprobe.c:107:#ifdef CONFIG_MTD_DOCPROBE_55AA
devices/docprobe.c:112:#endif /* CONFIG_MTD_DOCPROBE_55AA */
devices/docprobe.c:210:#ifdef CONFIG_MTD_DOCPROBE_55AA
devices/doc2001plus.c:75:	DEBUG(MTD_DEBUG_LEVEL3,
devices/doc2001plus.c:83:		DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
devices/doc2001plus.c:487:	mtd->type = MTD_NANDFLASH;
devices/doc2001plus.c:488:	mtd->flags = MTD_CAP_NANDFLASH;
devices/doc2001plus.c:489:	mtd->ecctype = MTD_ECC_RS_DiskOnChip;
devices/doc2001plus.c:1083:	instr->state = MTD_ERASE_PENDING;
devices/doc2001plus.c:1095:	instr->state = MTD_ERASING;
devices/doc2001plus.c:1105:		instr->state = MTD_ERASE_FAILED;
devices/doc2001plus.c:1107:		instr->state = MTD_ERASE_DONE;
devices/doc2000.c:95:	DEBUG(MTD_DEBUG_LEVEL3,
devices/doc2000.c:105:			DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
devices/doc2000.c:341:		DEBUG(MTD_DEBUG_LEVEL2,
devices/doc2000.c:350:		DEBUG(MTD_DEBUG_LEVEL2,
devices/doc2000.c:588:	mtd->type = MTD_NANDFLASH;
devices/doc2000.c:589:	mtd->flags = MTD_CAP_NANDFLASH;
devices/doc2000.c:590:	mtd->ecctype = MTD_ECC_RS_DiskOnChip;
devices/doc2000.c:1236:	instr->state = MTD_ERASING;
devices/doc2000.c:1271:			instr->state = MTD_ERASE_FAILED;
devices/doc2000.c:1277:	instr->state = MTD_ERASE_DONE;
devices/Makefile:13:obj-$(CONFIG_MTD_DOC2000)	+= doc2000.o
devices/Makefile:14:obj-$(CONFIG_MTD_DOC2001)	+= doc2001.o
devices/Makefile:15:obj-$(CONFIG_MTD_DOC2001PLUS)	+= doc2001plus.o
devices/Makefile:16:obj-$(CONFIG_MTD_DOCPROBE)	+= docprobe.o
devices/Makefile:17:obj-$(CONFIG_MTD_DOCECC)	+= docecc.o
devices/Makefile:18:obj-$(CONFIG_MTD_SLRAM)		+= slram.o
devices/Makefile:19:obj-$(CONFIG_MTD_PHRAM)		+= phram.o
devices/Makefile:20:obj-$(CONFIG_MTD_PMC551)	+= pmc551.o
devices/Makefile:21:obj-$(CONFIG_MTD_MS02NV)	+= ms02-nv.o
devices/Makefile:22:obj-$(CONFIG_MTD_MTDRAM)	+= mtdram.o
devices/Makefile:23:obj-$(CONFIG_MTD_LART)		+= lart.o
devices/Makefile:24:obj-$(CONFIG_MTD_BLKMTD)	+= blkmtd.o
devices/Kconfig:7:config MTD_PMC551
devices/Kconfig:25:config MTD_PMC551_BUGFIX
devices/Kconfig:27:	depends on MTD_PMC551
devices/Kconfig:33:config MTD_PMC551_DEBUG
devices/Kconfig:35:	depends on MTD_PMC551
devices/Kconfig:41:config MTD_MS02NV
devices/Kconfig:50:config MTD_SLRAM
devices/Kconfig:58:config MTD_PHRAM
devices/Kconfig:68:config MTD_LART
devices/Kconfig:76:config MTD_MTDRAM
devices/Kconfig:86:	depends on MTD_MTDRAM
devices/Kconfig:96:	depends on MTD_MTDRAM
devices/Kconfig:107:	depends on MTD_MTDRAM=y
devices/Kconfig:116:config MTD_BLKMTD
devices/Kconfig:130:config MTD_DOC2000
devices/Kconfig:151:config MTD_DOC2001
devices/Kconfig:171:config MTD_DOC2001PLUS
devices/Kconfig:187:config MTD_DOCPROBE
devices/Kconfig:189:	default m if MTD_DOC2001!=y && MTD_DOC2000!=y && MTD_DOC2001PLUS!=y && (MTD_DOC2001=m || MTD_DOC2000=m || MTD_DOC2001PLUS=m)
devices/Kconfig:190:	default y if MTD_DOC2001=y || MTD_DOC2000=y || MTD_DOC2001PLUS=y
devices/Kconfig:194:config MTD_DOCECC
devices/Kconfig:196:	default m if MTD_DOCPROBE!=y && MTD_NAND_DISKONCHIP!=y && (MTD_DOCPROBE=m || MTD_NAND_DISKONCHIP=m)
devices/Kconfig:197:	default y if MTD_DOCPROBE=y || MTD_NAND_DISKONCHIP=y
devices/Kconfig:201:config MTD_DOCPROBE_ADVANCED
devices/Kconfig:203:	depends on MTD_DOCPROBE
devices/Kconfig:210:config MTD_DOCPROBE_ADDRESS
devices/Kconfig:211:	hex "Physical address of DiskOnChip" if MTD_DOCPROBE_ADVANCED
devices/Kconfig:212:	depends on MTD_DOCPROBE
devices/Kconfig:213:	default "0x0000" if MTD_DOCPROBE_ADVANCED
devices/Kconfig:214:	default "0" if !MTD_DOCPROBE_ADVANCED
devices/Kconfig:228:config MTD_DOCPROBE_HIGH
devices/Kconfig:230:	depends on MTD_DOCPROBE_ADVANCED
devices/Kconfig:238:config MTD_DOCPROBE_55AA
devices/Kconfig:240:	depends on MTD_DOCPROBE_ADVANCED
ftl.c:401:    if (erase->state == MTD_ERASE_DONE)
inftlcore.c:58:	if (mtd->type != MTD_NANDFLASH)
inftlcore.c:71:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: add_mtd for %s\n", mtd->name);
inftlcore.c:86:	inftl->oobinfo.useecc = MTD_NANDECC_PLACEONLY;
inftlcore.c:146:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: remove_dev (i=%d)\n", dev->devnum);
inftlcore.c:170:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_findfreeblock(inftl=%p,"
inftlcore.c:178:		DEBUG(MTD_DEBUG_LEVEL1, "INFTL: there are too few free "
inftlcore.c:213:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_foldchain(inftl=%p,thisVUC=%d,"
inftlcore.c:237:			if (MTD_READOOB(inftl->mbd.mtd, (thisEUN * inftl->EraseSize)
inftlcore.c:276:	DEBUG(MTD_DEBUG_LEVEL1, "INFTL: folding chain %d into unit %d\n",
inftlcore.c:299:                ret = MTD_READ(inftl->mbd.mtd, (inftl->EraseSize *
inftlcore.c:303:			ret = MTD_READ(inftl->mbd.mtd, (inftl->EraseSize *
inftlcore.c:307:                        	DEBUG(MTD_DEBUG_LEVEL1, "INFTL: error went "
inftlcore.c:312:                MTD_WRITEECC(inftl->mbd.mtd, (inftl->EraseSize * targetEUN) +
inftlcore.c:323:	DEBUG(MTD_DEBUG_LEVEL1, "INFTL: want to erase virtual chain %d\n",
inftlcore.c:369:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_makefreeblock(inftl=%p,"
inftlcore.c:431:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_findwriteunit(inftl=%p,"
inftlcore.c:444:			MTD_READOOB(inftl->mbd.mtd, (thisEUN * inftl->EraseSize) +
inftlcore.c:448:			DEBUG(MTD_DEBUG_LEVEL3, "INFTL: status of block %d in "
inftlcore.c:502:			DEBUG(MTD_DEBUG_LEVEL1, "INFTL: using desperate==1 "
inftlcore.c:532:			MTD_READOOB(inftl->mbd.mtd, thisEUN * inftl->EraseSize
inftlcore.c:554:		MTD_WRITEOOB(inftl->mbd.mtd, writeEUN * inftl->EraseSize + 8, 8,
inftlcore.c:565:		MTD_WRITEOOB(inftl->mbd.mtd, writeEUN * inftl->EraseSize + 
inftlcore.c:593:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_trydeletechain(inftl=%p,"
inftlcore.c:616:			if (MTD_READOOB(inftl->mbd.mtd, (thisEUN * inftl->EraseSize)
inftlcore.c:657:	DEBUG(MTD_DEBUG_LEVEL1, "INFTL: deleting empty VUC %d\n", thisVUC);
inftlcore.c:665:			DEBUG(MTD_DEBUG_LEVEL2, "INFTL: Empty VUC %d for deletion was already absent\n", thisEUN);
inftlcore.c:677:		DEBUG(MTD_DEBUG_LEVEL3, "Deleting EUN %d from VUC %d\n",
inftlcore.c:712:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_deleteblock(inftl=%p,"
inftlcore.c:716:		if (MTD_READOOB(inftl->mbd.mtd, (thisEUN * inftl->EraseSize) +
inftlcore.c:751:		if (MTD_READOOB(inftl->mbd.mtd, ptr, 8, &retlen, (char *)&bci) < 0)
inftlcore.c:754:		if (MTD_WRITEOOB(inftl->mbd.mtd, ptr, 8, &retlen, (char *)&bci) < 0)
inftlcore.c:771:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: inftl_writeblock(inftl=%p,block=%ld,"
inftlcore.c:794:		MTD_WRITEECC(inftl->mbd.mtd, (writeEUN * inftl->EraseSize) +
inftlcore.c:819:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: inftl_readblock(inftl=%p,block=%ld,"
inftlcore.c:823:		if (MTD_READOOB(inftl->mbd.mtd, (thisEUN * inftl->EraseSize) +
inftlcore.c:862:		if (MTD_READ(inftl->mbd.mtd, ptr, SECTORSIZE, &retlen,
inftlmount.c:63:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: find_boot_record(inftl=%p)\n", inftl);
inftlmount.c:83:		ret = MTD_READ(inftl->mbd.mtd, block * inftl->EraseSize,
inftlmount.c:109:		if ((ret = MTD_READOOB(inftl->mbd.mtd, block * inftl->EraseSize +
inftlmount.c:126:		MTD_READ(inftl->mbd.mtd, block * inftl->EraseSize + 4096,
inftlmount.c:147:#ifdef CONFIG_MTD_DEBUG_VERBOSE
inftlmount.c:148:		if (CONFIG_MTD_DEBUG_VERBOSE >= 2) {
inftlmount.c:208:#ifdef CONFIG_MTD_DEBUG_VERBOSE
inftlmount.c:209:			if (CONFIG_MTD_DEBUG_VERBOSE >= 2) {
inftlmount.c:234:				MTD_ERASE(inftl->mbd.mtd, instr);
inftlmount.c:354:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: check_free_sectors(inftl=%p,"
inftlmount.c:359:		if (MTD_READECC(inftl->mbd.mtd, address, SECTORSIZE, &retlen, buf, &buf[SECTORSIZE], &inftl->oobinfo) < 0)
inftlmount.c:390:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_formatblock(inftl=%p,"
inftlmount.c:405:		MTD_ERASE(inftl->mbd.mtd, instr);
inftlmount.c:407:		if (instr->state == MTD_ERASE_FAILED) {
inftlmount.c:429:	if (MTD_WRITEOOB(inftl->mbd.mtd, instr->addr +
inftlmount.c:558:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: INFTL_mount(inftl=%p)\n", s);
inftlmount.c:583:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: pass 1, explore each unit\n");
inftlmount.c:601:			if (MTD_READOOB(s->mbd.mtd, block * s->EraseSize + 8,
inftlmount.c:603:			    MTD_READOOB(s->mbd.mtd, block * s->EraseSize +
inftlmount.c:714:#ifdef CONFIG_MTD_DEBUG_VERBOSE
inftlmount.c:715:	if (CONFIG_MTD_DEBUG_VERBOSE >= 2)
inftlmount.c:724:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: pass 2, validate virtual chains\n");
inftlmount.c:769:#ifdef CONFIG_MTD_DEBUG_VERBOSE
inftlmount.c:770:	if (CONFIG_MTD_DEBUG_VERBOSE >= 2)
inftlmount.c:772:	if (CONFIG_MTD_DEBUG_VERBOSE >= 2)
inftlmount.c:782:	DEBUG(MTD_DEBUG_LEVEL3, "INFTL: pass 3, format unused blocks\n");
maps/snapgear-uc.c:166:	for (i = 0; i < MAX_MTD_DEVICES; i++) {
maps/snapgear-uc.c:178:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/snapgear-uc.c:378:		ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index);
maps/snapgear-uc.c:397:			ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index);
maps/snapgear-uc.c:408:			ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index);
maps/snapgear-uc.c:419:            ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index);
maps/snapgear-uc.c:427:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/snapgeode.c:31:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/snapgeode.c:123:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/snapgeode.c:147:#endif /* CONFIG_MTD_CFI_INTELEXT */
maps/snapgeode.c:176:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/snapgeode.c:185:	ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, 1);
maps/snapgeode.c:192:#endif /* !CONFIG_MTD_CFI_INTELEXT */
maps/snapgeode.c:201:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/physmap.c:27:	.phys = CONFIG_MTD_PHYSMAP_START,
maps/physmap.c:28:	.size = CONFIG_MTD_PHYSMAP_LEN,
maps/physmap.c:29:	.bankwidth = CONFIG_MTD_PHYSMAP_BANKWIDTH,
maps/physmap.c:32:#ifdef CONFIG_MTD_PARTITIONS
maps/physmap.c:46:#endif /* CONFIG_MTD_PARTITIONS */
maps/physmap.c:71:#ifdef CONFIG_MTD_PARTITIONS
maps/physmap.c:101:#ifdef CONFIG_MTD_PARTITIONS
maps/db1550-flash.c:44:#if defined(CONFIG_MTD_DB1550_BOOT) && defined(CONFIG_MTD_DB1550_USER)
maps/db1550-flash.c:46:#elif defined(CONFIG_MTD_DB1550_BOOT) && !defined(CONFIG_MTD_DB1550_USER)
maps/db1550-flash.c:48:#elif !defined(CONFIG_MTD_DB1550_BOOT) && defined(CONFIG_MTD_DB1550_USER)
maps/db1550-flash.c:70:                .mask_flags = MTD_WRITEABLE
maps/db1550-flash.c:90:                .mask_flags = MTD_WRITEABLE
maps/db1550-flash.c:113:#error MTD_DB1550 define combo error /* should never happen */
maps/iop3xx.c:62:		.mask_flags =	MTD_WRITEABLE 
maps/sbc8240.c:31:#ifdef CONFIG_MTD_PARTITIONS
maps/sbc8240.c:83:#ifdef CONFIG_MTD_PARTITIONS
maps/sbc8240.c:91:		.mask_flags = MTD_WRITEABLE,		/*  force read-only	*/
maps/sbc8240.c:142:#endif	/* CONFIG_MTD_PARTITIONS */
maps/sbc8240.c:190:#ifdef CONFIG_MTD_PARTITIONS
maps/sbc8240.c:220:#endif	/* CONFIG_MTD_PARTITIONS */
maps/edb7312.c:22:#ifdef CONFIG_MTD_PARTITIONS
maps/edb7312.c:46:#ifdef CONFIG_MTD_PARTITIONS
maps/edb7312.c:103:#ifdef CONFIG_MTD_PARTITIONS
maps/impa7.c:22:#ifdef CONFIG_MTD_PARTITIONS
maps/impa7.c:55:#ifdef CONFIG_MTD_PARTITIONS
maps/impa7.c:111:#ifdef CONFIG_MTD_PARTITIONS
maps/impa7.c:145:#ifdef CONFIG_MTD_PARTITIONS
maps/redwood.c:49:		.mask_flags = MTD_WRITEABLE	/* force read-only */
maps/redwood.c:60:		.mask_flags = MTD_WRITEABLE	/* force read-only */
maps/redwood.c:71:		.mask_flags = MTD_WRITEABLE	/* force read-only */
maps/redwood.c:99:		.mask_flags = MTD_WRITEABLE	/* force read-only */
maps/redwood.c:110:		.mask_flags = MTD_WRITEABLE	/* force read-only */
maps/pb1550-flash.c:63:                .mask_flags = MTD_WRITEABLE
maps/pb1550-flash.c:83:                .mask_flags = MTD_WRITEABLE
maps/pb1550-flash.c:106:#error MTD_PB1550 define combo error /* should never happen */
maps/ceiva.c:37:#define CONFIG_MTD_CEIVA_STATICMAP
maps/ceiva.c:39:#ifdef CONFIG_MTD_CEIVA_STATICMAP
maps/ceiva.c:199:#ifdef CONFIG_MTD_CONCAT
maps/ceiva.c:290:#ifdef CONFIG_MTD_CEIVA_STATICMAP
maps/solutionengine.c:41:#ifdef CONFIG_MTD_SUPERH_RESERVE
maps/solutionengine.c:47:		.size = CONFIG_MTD_SUPERH_RESERVE,
maps/solutionengine.c:48:		.mask_flags = MTD_WRITEABLE,
maps/solutionengine.c:57:#endif /* CONFIG_MTD_SUPERH_RESERVE */
maps/solutionengine.c:100:#ifdef CONFIG_MTD_SUPERH_RESERVE
maps/solutionengine.c:103:		       CONFIG_MTD_SUPERH_RESERVE);
maps/solutionengine.c:107:#endif /* CONFIG_MTD_SUPERH_RESERVE */
maps/sa1100-flash.c:37:#define CONFIG_MTD_SA1100_STATICMAP 1
maps/sa1100-flash.c:39:#ifdef CONFIG_MTD_SA1100_STATICMAP
maps/sa1100-flash.c:64:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:69:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:74:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:90:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:95:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:109:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:114:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:193:		.mask_flags	= MTD_WRITABLE, /* force read-only */
maps/sa1100-flash.c:232:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:237:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:242:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:247:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:252:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:257:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:262:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:267:		.mask_flags	= MTD_WRITEABLE,
maps/sa1100-flash.c:279:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:331:		.mask_flags	= MTD_WRITEABLE
maps/sa1100-flash.c:336:		.mask_flags	= MTD_WRITEABLE
maps/sa1100-flash.c:341:		.mask_flags	= MTD_WRITEABLE
maps/sa1100-flash.c:346:		.mask_flags	= MTD_WRITEABLE
maps/sa1100-flash.c:361:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:366:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:381:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:387:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:403:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:405:#ifdef CONFIG_MTD_2PARTS_IPAQ
maps/sa1100-flash.c:457:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:505:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:551:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:575:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:637:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:667:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:726:		.mask_flags	= MTD_WRITEABLE,  /* force read-only */
maps/sa1100-flash.c:987:#ifdef CONFIG_MTD_CONCAT
maps/sa1100-flash.c:1025:#ifdef CONFIG_MTD_CONCAT
maps/sa1100-flash.c:1289:#ifdef CONFIG_MTD_PARTITIONS
maps/sa1100-flash.c:1296:#ifdef CONFIG_MTD_SA1100_STATICMAP
maps/lasat.c:27:static struct mtd_partition partition_info[LASAT_MTD_LAST];
maps/lasat.c:52:	lasat_map.phys = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
maps/lasat.c:59:	for (i=0; i < LASAT_MTD_LAST; i++)
maps/lasat.c:72:		for (i=0; i < LASAT_MTD_LAST; i++) {
maps/lasat.c:79:		add_mtd_partitions( lasat_mtd, partition_info, LASAT_MTD_LAST );
maps/dmv182.c:93:		mask_flags: MTD_WRITEABLE // read-only
maps/omap-toto-flash.c:47:		.mask_flags =	MTD_WRITEABLE,  /* force read-only */
maps/omap-toto-flash.c:52:		//mask_flags:	MTD_WRITEABLE,  /* force read-only */
maps/cstm_mips_ixx.c:139:	CONFIG_MTD_CSTM_MIPS_IXX_START,      // window_addr
maps/cstm_mips_ixx.c:140:	CONFIG_MTD_CSTM_MIPS_IXX_LEN,        // window_size
maps/cstm_mips_ixx.c:141:        CONFIG_MTD_CSTM_MIPS_IXX_BUSWIDTH,   // bankwidth
maps/cstm_mips_ixx.c:150:		.size =  CONFIG_MTD_CSTM_MIPS_IXX_LEN,
maps/epxa10db-flash.c:90:#ifdef CONFIG_MTD_PARTITIONS
maps/tqm8xxl.c:22: * Thus, we choose CONFIG_MTD_CFI_I2 & CONFIG_MTD_CFI_B4 at 
maps/tqm8xxl.c:66:#ifdef CONFIG_MTD_PARTITIONS
maps/tqm8xxl.c:78:	  .mask_flags = MTD_WRITEABLE,  /* force read-only */
maps/tqm8xxl.c:84:	  .mask_flags = MTD_WRITEABLE,  /* force read-only */
maps/tqm8xxl.c:193:#ifdef CONFIG_MTD_PARTITIONS
maps/db1x00-flash.c:58:                .mask_flags   =  MTD_WRITEABLE
maps/db1x00-flash.c:75:                .mask_flags   =  MTD_WRITEABLE
maps/db1x00-flash.c:95:#error MTD_DB1X00 define combo error /* should never happen */
maps/h720x-flash.c:39:                .mask_flags = MTD_WRITEABLE
maps/h720x-flash.c:44:                .mask_flags = MTD_WRITEABLE
maps/h720x-flash.c:49:                .mask_flags = MTD_WRITEABLE
maps/h720x-flash.c:54:                .mask_flags = MTD_WRITEABLE
maps/h720x-flash.c:98:#ifdef CONFIG_MTD_PARTITIONS
maps/Kconfig.orig:7:config MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:14:config MTD_PHYSMAP
maps/Kconfig.orig:16:	depends on MTD_CFI
maps/Kconfig.orig:25:config MTD_PHYSMAP_START
maps/Kconfig.orig:27:	depends on MTD_PHYSMAP
maps/Kconfig.orig:37:config MTD_PHYSMAP_LEN
maps/Kconfig.orig:39:	depends on MTD_PHYSMAP
maps/Kconfig.orig:51:config MTD_PHYSMAP_BANKWIDTH
maps/Kconfig.orig:53:	depends on MTD_PHYSMAP
maps/Kconfig.orig:63:config MTD_SUN_UFLASH
maps/Kconfig.orig:65:	depends on (SPARC32 || SPARC64) && MTD_CFI
maps/Kconfig.orig:72:config MTD_PNC2000
maps/Kconfig.orig:74:	depends on X86 && MTD_CFI && MTD_PARTITIONS
maps/Kconfig.orig:79:config MTD_SC520CDP
maps/Kconfig.orig:81:	depends on X86 && MTD_CFI
maps/Kconfig.orig:87:config MTD_NETSC520
maps/Kconfig.orig:89:	depends on X86 && MTD_CFI && MTD_PARTITIONS
maps/Kconfig.orig:95:config MTD_SBC_GXX
maps/Kconfig.orig:97:	depends on X86 && MTD_CFI_INTELEXT && MTD_PARTITIONS && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:106:config MTD_ELAN_104NC
maps/Kconfig.orig:108:	depends on X86 && MTD_CFI_INTELEXT && MTD_PARTITIONS && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:116:config MTD_LUBBOCK
maps/Kconfig.orig:118:	depends on ARCH_LUBBOCK && MTD_CFI_INTELEXT && MTD_PARTITIONS
maps/Kconfig.orig:123:config MTD_OCTAGON
maps/Kconfig.orig:125:	depends on X86 && MTD_JEDEC && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:132:config MTD_VMAX
maps/Kconfig.orig:134:	depends on X86 && MTD_JEDEC && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:141:config MTD_SCx200_DOCFLASH
maps/Kconfig.orig:143:	depends on X86 && MTD_CFI
maps/Kconfig.orig:152:config MTD_AMD76XROM
maps/Kconfig.orig:154:	depends on X86 && MTD_JEDECPROBE
maps/Kconfig.orig:161:config MTD_ICHXROM
maps/Kconfig.orig:163:	depends on X86 && MTD_JEDECPROBE && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:170:config MTD_SCB2_FLASH
maps/Kconfig.orig:172:	depends on X86 && MTD_JEDECPROBE
maps/Kconfig.orig:179:config MTD_TSUNAMI
maps/Kconfig.orig:181:	depends on ALPHA_TSUNAMI && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:185:config MTD_LASAT
maps/Kconfig.orig:191:config MTD_NETtel
maps/Kconfig.orig:193:	depends on X86 && MTD_PARTITIONS && MTD_JEDECPROBE
maps/Kconfig.orig:197:config MTD_SNAPGEODE
maps/Kconfig.orig:199:	depends on X86 && MTD_PARTITIONS
maps/Kconfig.orig:203:config MTD_SE4000
maps/Kconfig.orig:205:	depends on ARCH_SE4000 && MTD_CFI && MTD_PARTITIONS
maps/Kconfig.orig:209:config MTD_PB1XXX
maps/Kconfig.orig:215:config MTD_PB1XXX_BOOT
maps/Kconfig.orig:217:	depends on MTD_PB1XXX && ( MIPS_PB1100 || MIPS_PB1500 )
maps/Kconfig.orig:220:	  You can say 'Y' to both this and 'MTD_PB1XXX_USER' below, to use
maps/Kconfig.orig:223:config MTD_PB1XXX_USER
maps/Kconfig.orig:225:	depends on MTD_PB1XXX && ( MIPS_PB1100 || MIPS_PB1500 )
maps/Kconfig.orig:226:	default y if MTD_PB1XX_BOOT = n
maps/Kconfig.orig:229:	  You can say 'Y' to both this and 'MTD_PB1XXX_BOOT' above, to use
maps/Kconfig.orig:232:config MTD_PB1550
maps/Kconfig.orig:238:config MTD_PB1550_BOOT
maps/Kconfig.orig:240:	depends on MTD_PB1550
maps/Kconfig.orig:243:	  You can say 'Y' to both this and 'MTD_PB1550_USER' below, to use
maps/Kconfig.orig:246:config MTD_PB1550_USER
maps/Kconfig.orig:248:	depends on MTD_PB1550
maps/Kconfig.orig:249:	default y if MTD_PB1550_BOOT = n
maps/Kconfig.orig:252:	  You can say 'Y' to both this and 'MTD_PB1550_BOOT' above, to use
maps/Kconfig.orig:255:config MTD_DB1550
maps/Kconfig.orig:261:config MTD_DB1550_BOOT
maps/Kconfig.orig:263:	depends on MTD_DB1550
maps/Kconfig.orig:266:	  You can say 'Y' to both this and 'MTD_DB1550_USER' below, to use
maps/Kconfig.orig:269:config MTD_DB1550_USER
maps/Kconfig.orig:271:	depends on MTD_DB1550
maps/Kconfig.orig:272:	default y if MTD_DB1550_BOOT = n
maps/Kconfig.orig:275:	  You can say 'Y' to both this and 'MTD_DB1550_BOOT' above, to use
maps/Kconfig.orig:278:config MTD_DILNETPC
maps/Kconfig.orig:280:	depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
maps/Kconfig.orig:286:config MTD_DILNETPC_BOOTSIZE
maps/Kconfig.orig:288:	depends on MTD_DILNETPC
maps/Kconfig.orig:294:config MTD_L440GX
maps/Kconfig.orig:296:	depends on X86 && MTD_JEDECPROBE
maps/Kconfig.orig:303:config MTD_SBC8240
maps/Kconfig.orig:305:	depends on PPC32 && MTD_JEDECPROBE && 6xx && 8260
maps/Kconfig.orig:310:config MTD_TQM8XXL
maps/Kconfig.orig:312:	depends on MTD_CFI && PPC32 && 8xx && TQM8xxL
maps/Kconfig.orig:320:config MTD_RPXLITE
maps/Kconfig.orig:322:	depends on MTD_CFI && PPC32 && 8xx && (RPXCLASSIC || RPXLITE)
maps/Kconfig.orig:330:config MTD_MBX860
maps/Kconfig.orig:332:	depends on MTD_CFI && PPC32 && 8xx && MBX
maps/Kconfig.orig:338:config MTD_DBOX2
maps/Kconfig.orig:340:	depends on PPC32 && 8xx && DBOX2 && MTD_CFI_INTELSTD && MTD_CFI_INTELEXT && MTD_CFI_AMDSTD
maps/Kconfig.orig:346:config MTD_CFI_FLAGADM
maps/Kconfig.orig:348:	depends on PPC32 && 8xx && MTD_CFI
maps/Kconfig.orig:353:config MTD_BEECH
maps/Kconfig.orig:355:	depends on MTD_CFI && PPC32 && 40x && BEECH
maps/Kconfig.orig:361:config MTD_ARCTIC
maps/Kconfig.orig:363:	depends on MTD_CFI && PPC32 && 40x && ARCTIC2
maps/Kconfig.orig:369:config MTD_EBONY
maps/Kconfig.orig:371:	depends on MTD_CFI && PPC32 && 440 && EBONY
maps/Kconfig.orig:377:config MTD_REDWOOD
maps/Kconfig.orig:379:	depends on MTD_CFI && PPC32 && 4xx && 40x && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 )
maps/Kconfig.orig:385:config MTD_CSTM_MIPS_IXX
maps/Kconfig.orig:387:	depends on MIPS && MTD_CFI && MTD_JEDECPROBE && MTD_PARTITIONS
maps/Kconfig.orig:394:	  other boards via setting of the CONFIG_MTD_CSTM_MIPS_IXX_START/
maps/Kconfig.orig:401:config MTD_CSTM_MIPS_IXX_START
maps/Kconfig.orig:403:	depends on MTD_CSTM_MIPS_IXX
maps/Kconfig.orig:411:config MTD_CSTM_MIPS_IXX_LEN
maps/Kconfig.orig:413:	depends on MTD_CSTM_MIPS_IXX
maps/Kconfig.orig:421:config MTD_CSTM_MIPS_IXX_BUSWIDTH
maps/Kconfig.orig:423:	depends on MTD_CSTM_MIPS_IXX
maps/Kconfig.orig:429:config MTD_OCELOT
maps/Kconfig.orig:437:config MTD_SOLUTIONENGINE
maps/Kconfig.orig:439:	depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
maps/Kconfig.orig:444:config MTD_ARM_INTEGRATOR
maps/Kconfig.orig:446:	depends on ARM && MTD_CFI
maps/Kconfig.orig:448:config MTD_CDB89712
maps/Kconfig.orig:450:	depends on ARM && MTD_CFI && ARCH_CDB89712
maps/Kconfig.orig:455:config MTD_SA1100
maps/Kconfig.orig:457:	depends on ARM && MTD_CFI && ARCH_SA1100 && MTD_PARTITIONS
maps/Kconfig.orig:463:config MTD_DC21285
maps/Kconfig.orig:465:	depends on ARM && MTD_CFI && ARCH_FOOTBRIDGE && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:471:config MTD_IQ80310
maps/Kconfig.orig:473:	depends on ARM && MTD_CFI && ARCH_IQ80310
maps/Kconfig.orig:479:config MTD_IXP4XX
maps/Kconfig.orig:481:	depends on ARM && MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX
maps/Kconfig.orig:488:config MTD_IXP2000
maps/Kconfig.orig:490:	depends on ARM && MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP2000
maps/Kconfig.orig:497:config MTD_EPXA10DB
maps/Kconfig.orig:499:	depends on ARM && MTD_CFI && MTD_PARTITIONS && ARCH_CAMELOT
maps/Kconfig.orig:505:config MTD_FORTUNET
maps/Kconfig.orig:507:	depends on ARM && MTD_CFI && MTD_PARTITIONS && SA1100_FORTUNET
maps/Kconfig.orig:512:config MTD_AUTCPU12
maps/Kconfig.orig:519:config MTD_EDB7312
maps/Kconfig.orig:521:	depends on ARM && MTD_CFI
maps/Kconfig.orig:526:config MTD_IMPA7
maps/Kconfig.orig:528:	depends on ARM && MTD_JEDECPROBE
maps/Kconfig.orig:533:config MTD_CEIVA
maps/Kconfig.orig:535:	depends on ARM && MTD_JEDECPROBE && ARCH_CEIVA
maps/Kconfig.orig:541:config MTD_NOR_TOTO
maps/Kconfig.orig:548:config MTD_H720X
maps/Kconfig.orig:550:	depends on ARM && MTD_CFI && ( ARCH_H7201 || ARCH_H7202 )
maps/Kconfig.orig:555:config MTD_MPC1211
maps/Kconfig.orig:557:	depends on SUPERH && SH_MPC1211 && MTD_CFI
maps/Kconfig.orig:563:config MTD_PCI
maps/Kconfig.orig:565:	depends on MTD && PCI && MTD_COMPLEX_MAPPINGS
maps/Kconfig.orig:573:config MTD_PCMCIA
maps/Kconfig.orig:575:	depends on MTD && PCMCIA && MTD_COMPLEX_MAPPINGS && BROKEN
maps/Kconfig.orig:581:config MTD_UCLINUX
maps/Kconfig.orig:583:	depends on MTD_PARTITIONS && !MMU
maps/Kconfig.orig:587:config MTD_SNAPGEARuC
maps/Kconfig.orig:589:	depends on MTD_PARTITIONS
maps/Kconfig.orig:593:config MTD_CPU16B
maps/Kconfig.orig:595:	depends on MTD_PARTITIONS && SNEHA && CPU16B
maps/Kconfig.orig:601:	depends on MTD_SNAPGEARuC
maps/Kconfig.orig:623:config MTD_WRSBC8260
maps/Kconfig.orig:626:	select MTD_PARTITIONS
maps/Kconfig.orig:627:	select MTD_MAP_BANK_WIDTH_4
maps/Kconfig.orig:628:	select MTD_MAP_BANK_WIDTH_1
maps/Kconfig.orig:629:	select MTD_CFI_I1
maps/Kconfig.orig:630:	select MTD_CFI_I4
maps/Kconfig.orig:636:config MTD_DMV182
maps/Kconfig.orig:639:        select MTD_PARTITIONS
maps/Kconfig.orig:640:	select MTD_MAP_BANK_WIDTH_32
maps/Kconfig.orig:641:	select MTD_CFI_I8
maps/Kconfig.orig:642:	select MTD_CFI_AMDSTD
maps/amd76xrom.c:24:#define MTD_DEV_NAME_LENGTH 16
maps/amd76xrom.c:34:	char mtd_name[MTD_DEV_NAME_LENGTH];
maps/amd76xrom.c:211:		snprintf(info->mtd_name, MTD_DEV_NAME_LENGTH,
maps/uclinux.c:100:	ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, 0);
maps/nettel.c:58:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:67:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:139:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:195:		ret = MTD_ERASE(mtd, &nettel_erase);
maps/nettel.c:228:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:249:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:299:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:310:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:347:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:425:	ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, 1);
maps/nettel.c:459:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:470:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/nettel.c:481:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/pcmciamtd.c:30:#ifdef CONFIG_MTD_DEBUG
maps/pcmciamtd.c:31:static int debug = CONFIG_MTD_DEBUG_VERBOSE;
maps/dc21285.c:139:#ifdef CONFIG_MTD_PARTITIONS
maps/dc21285.c:146:#ifdef CONFIG_MTD_PARTITIONS
maps/dc21285.c:197:#ifdef CONFIG_MTD_PARTITIONS
maps/dc21285.c:225:#ifdef CONFIG_MTD_PARTITIONS
maps/se4000.c:38:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/se4000.c:124:#ifdef CONFIG_MTD_CFI_INTELEXT
maps/Makefile:6:ifeq ($(CONFIG_MTD_COMPLEX_MAPPINGS),y)
maps/Makefile:11:obj-$(CONFIG_MTD_CDB89712)	+= cdb89712.o
maps/Makefile:12:obj-$(CONFIG_MTD_ARM_INTEGRATOR)+= integrator-flash.o
maps/Makefile:13:obj-$(CONFIG_MTD_CFI_FLAGADM)	+= cfi_flagadm.o
maps/Makefile:14:obj-$(CONFIG_MTD_CSTM_MIPS_IXX)	+= cstm_mips_ixx.o
maps/Makefile:15:obj-$(CONFIG_MTD_DC21285)	+= dc21285.o
maps/Makefile:16:obj-$(CONFIG_MTD_DILNETPC)	+= dilnetpc.o
maps/Makefile:17:obj-$(CONFIG_MTD_ELAN_104NC)	+= elan-104nc.o
maps/Makefile:18:obj-$(CONFIG_MTD_EPXA10DB)	+= epxa10db-flash.o
maps/Makefile:19:obj-$(CONFIG_MTD_IOP3XX)        += iop3xx.o
maps/Makefile:20:obj-$(CONFIG_MTD_L440GX)	+= l440gx.o
maps/Makefile:21:obj-$(CONFIG_MTD_AMD76XROM)	+= amd76xrom.o
maps/Makefile:22:obj-$(CONFIG_MTD_ICHXROM)	+= ichxrom.o
maps/Makefile:23:obj-$(CONFIG_MTD_TSUNAMI)	+= tsunami_flash.o
maps/Makefile:24:obj-$(CONFIG_MTD_LUBBOCK)	+= lubbock-flash.o
maps/Makefile:25:obj-$(CONFIG_MTD_MBX860)	+= mbx860.o
maps/Makefile:26:obj-$(CONFIG_MTD_CEIVA)		+= ceiva.o
maps/Makefile:27:obj-$(CONFIG_MTD_OCTAGON)	+= octagon-5066.o
maps/Makefile:28:obj-$(CONFIG_MTD_PHYSMAP)	+= physmap.o 
maps/Makefile:29:obj-$(CONFIG_MTD_PNC2000)	+= pnc2000.o
maps/Makefile:30:obj-$(CONFIG_MTD_PCMCIA)	+= pcmciamtd.o
maps/Makefile:31:obj-$(CONFIG_MTD_RPXLITE)	+= rpxlite.o
maps/Makefile:32:obj-$(CONFIG_MTD_TQM8XXL)	+= tqm8xxl.o
maps/Makefile:33:obj-$(CONFIG_MTD_SA1100)	+= sa1100-flash.o
maps/Makefile:34:obj-$(CONFIG_MTD_SBC_GXX)	+= sbc_gxx.o
maps/Makefile:35:obj-$(CONFIG_MTD_SC520CDP)	+= sc520cdp.o
maps/Makefile:36:obj-$(CONFIG_MTD_NETSC520)	+= netsc520.o
maps/Makefile:37:obj-$(CONFIG_MTD_SUN_UFLASH)	+= sun_uflash.o
maps/Makefile:38:obj-$(CONFIG_MTD_VMAX)		+= vmax301.o
maps/Makefile:39:obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o
maps/Makefile:40:obj-$(CONFIG_MTD_DBOX2)		+= dbox2-flash.o
maps/Makefile:41:obj-$(CONFIG_MTD_OCELOT)	+= ocelot.o
maps/Makefile:42:obj-$(CONFIG_MTD_UCLINUX)	+= uclinux.o
maps/Makefile:43:obj-$(CONFIG_MTD_SNAPGEARuC)	+= snapgear-uc.o
maps/Makefile:44:obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
maps/Makefile:45:obj-$(CONFIG_MTD_PCI)		+= pci.o
maps/Makefile:46:obj-$(CONFIG_MTD_PB1XXX)	+= pb1xxx-flash.o
maps/Makefile:47:obj-$(CONFIG_MTD_DB1X00)        += db1x00-flash.o
maps/Makefile:48:obj-$(CONFIG_MTD_PB1550)        += pb1550-flash.o
maps/Makefile:49:obj-$(CONFIG_MTD_DB1550)        += db1550-flash.o
maps/Makefile:50:obj-$(CONFIG_MTD_LASAT)		+= lasat.o
maps/Makefile:51:obj-$(CONFIG_MTD_AUTCPU12)	+= autcpu12-nvram.o
maps/Makefile:52:obj-$(CONFIG_MTD_EDB7312)	+= edb7312.o
maps/Makefile:53:obj-$(CONFIG_MTD_IMPA7)		+= impa7.o
maps/Makefile:54:obj-$(CONFIG_MTD_FORTUNET)	+= fortunet.o
maps/Makefile:55:obj-$(CONFIG_MTD_REDWOOD)	+= redwood.o
maps/Makefile:56:obj-$(CONFIG_MTD_UCLINUX)	+= uclinux.o
maps/Makefile:57:obj-$(CONFIG_MTD_NETtel)	+= nettel.o
maps/Makefile:58:obj-$(CONFIG_MTD_SNAPGEODE)	+= snapgeode.o
maps/Makefile:59:obj-$(CONFIG_MTD_SE4000)	+= se4000.o
maps/Makefile:60:obj-$(CONFIG_MTD_SCB2_FLASH)	+= scb2_flash.o
maps/Makefile:61:obj-$(CONFIG_MTD_EBONY)		+= ebony.o
maps/Makefile:62:obj-$(CONFIG_MTD_BEECH)		+= beech-mtd.o
maps/Makefile:63:obj-$(CONFIG_MTD_ARCTIC)	+= arctic-mtd.o
maps/Makefile:64:obj-$(CONFIG_MTD_H720X)		+= h720x-flash.o
maps/Makefile:65:obj-$(CONFIG_MTD_SBC8240)	+= sbc8240.o
maps/Makefile:66:obj-$(CONFIG_MTD_NOR_TOTO)	+= omap-toto-flash.o
maps/Makefile:67:obj-$(CONFIG_MTD_MPC1211)	+= mpc1211.o
maps/Makefile:68:obj-$(CONFIG_MTD_IXP4XX)	+= ixp4xx.o
maps/Makefile:69:obj-$(CONFIG_MTD_IXP2000)	+= ixp2000.o
maps/Makefile:70:obj-$(CONFIG_MTD_WRSBC8260)	+= wr_sbc82xx_flash.o
maps/Makefile:71:obj-$(CONFIG_MTD_DMV182)	+= dmv182.o
maps/Makefile:72:obj-$(CONFIG_MTD_CPU16B)	+= mtdcpu16b.o
maps/dbox2-flash.c:26:	.mask_flags	= MTD_WRITEABLE
maps/dbox2-flash.c:56:	.mask_flags	= MTD_WRITEABLE
maps/ichxrom.c:24:#define MTD_DEV_NAME_LENGTH 16
maps/ichxrom.c:48:	char mtd_name[MTD_DEV_NAME_LENGTH];
maps/ichxrom.c:303:		snprintf(info->mtd_name, MTD_DEV_NAME_LENGTH,
maps/Kconfig:7:config MTD_COMPLEX_MAPPINGS
maps/Kconfig:14:config MTD_PHYSMAP
maps/Kconfig:16:	depends on MTD_CFI
maps/Kconfig:25:config MTD_PHYSMAP_START
maps/Kconfig:27:	depends on MTD_PHYSMAP
maps/Kconfig:37:config MTD_PHYSMAP_LEN
maps/Kconfig:39:	depends on MTD_PHYSMAP
maps/Kconfig:51:config MTD_PHYSMAP_BANKWIDTH
maps/Kconfig:53:	depends on MTD_PHYSMAP
maps/Kconfig:63:config MTD_SUN_UFLASH
maps/Kconfig:65:	depends on (SPARC32 || SPARC64) && MTD_CFI
maps/Kconfig:72:config MTD_PNC2000
maps/Kconfig:74:	depends on X86 && MTD_CFI && MTD_PARTITIONS
maps/Kconfig:79:config MTD_SC520CDP
maps/Kconfig:81:	depends on X86 && MTD_CFI
maps/Kconfig:87:config MTD_NETSC520
maps/Kconfig:89:	depends on X86 && MTD_CFI && MTD_PARTITIONS
maps/Kconfig:95:config MTD_SBC_GXX
maps/Kconfig:97:	depends on X86 && MTD_CFI_INTELEXT && MTD_PARTITIONS && MTD_COMPLEX_MAPPINGS
maps/Kconfig:106:config MTD_ELAN_104NC
maps/Kconfig:108:	depends on X86 && MTD_CFI_INTELEXT && MTD_PARTITIONS && MTD_COMPLEX_MAPPINGS
maps/Kconfig:116:config MTD_LUBBOCK
maps/Kconfig:118:	depends on ARCH_LUBBOCK && MTD_CFI_INTELEXT && MTD_PARTITIONS
maps/Kconfig:123:config MTD_OCTAGON
maps/Kconfig:125:	depends on X86 && MTD_JEDEC && MTD_COMPLEX_MAPPINGS
maps/Kconfig:132:config MTD_VMAX
maps/Kconfig:134:	depends on X86 && MTD_JEDEC && MTD_COMPLEX_MAPPINGS
maps/Kconfig:141:config MTD_SCx200_DOCFLASH
maps/Kconfig:143:	depends on X86 && MTD_CFI
maps/Kconfig:152:config MTD_AMD76XROM
maps/Kconfig:154:	depends on X86 && MTD_JEDECPROBE
maps/Kconfig:161:config MTD_ICHXROM
maps/Kconfig:163:	depends on X86 && MTD_JEDECPROBE && MTD_COMPLEX_MAPPINGS
maps/Kconfig:170:config MTD_SCB2_FLASH
maps/Kconfig:172:	depends on X86 && MTD_JEDECPROBE
maps/Kconfig:179:config MTD_TSUNAMI
maps/Kconfig:181:	depends on ALPHA_TSUNAMI && MTD_COMPLEX_MAPPINGS
maps/Kconfig:185:config MTD_LASAT
maps/Kconfig:191:config MTD_NETtel
maps/Kconfig:193:	depends on X86 && MTD_PARTITIONS && MTD_JEDECPROBE
maps/Kconfig:197:config MTD_SNAPGEODE
maps/Kconfig:199:	depends on X86 && MTD_PARTITIONS
maps/Kconfig:203:config MTD_SE4000
maps/Kconfig:205:	depends on ARCH_SE4000 && MTD_CFI && MTD_PARTITIONS
maps/Kconfig:209:config MTD_PB1XXX
maps/Kconfig:215:config MTD_PB1XXX_BOOT
maps/Kconfig:217:	depends on MTD_PB1XXX && ( MIPS_PB1100 || MIPS_PB1500 )
maps/Kconfig:220:	  You can say 'Y' to both this and 'MTD_PB1XXX_USER' below, to use
maps/Kconfig:223:config MTD_PB1XXX_USER
maps/Kconfig:225:	depends on MTD_PB1XXX && ( MIPS_PB1100 || MIPS_PB1500 )
maps/Kconfig:226:	default y if MTD_PB1XX_BOOT = n
maps/Kconfig:229:	  You can say 'Y' to both this and 'MTD_PB1XXX_BOOT' above, to use
maps/Kconfig:232:config MTD_PB1550
maps/Kconfig:238:config MTD_PB1550_BOOT
maps/Kconfig:240:	depends on MTD_PB1550
maps/Kconfig:243:	  You can say 'Y' to both this and 'MTD_PB1550_USER' below, to use
maps/Kconfig:246:config MTD_PB1550_USER
maps/Kconfig:248:	depends on MTD_PB1550
maps/Kconfig:249:	default y if MTD_PB1550_BOOT = n
maps/Kconfig:252:	  You can say 'Y' to both this and 'MTD_PB1550_BOOT' above, to use
maps/Kconfig:255:config MTD_DB1550
maps/Kconfig:261:config MTD_DB1550_BOOT
maps/Kconfig:263:	depends on MTD_DB1550
maps/Kconfig:266:	  You can say 'Y' to both this and 'MTD_DB1550_USER' below, to use
maps/Kconfig:269:config MTD_DB1550_USER
maps/Kconfig:271:	depends on MTD_DB1550
maps/Kconfig:272:	default y if MTD_DB1550_BOOT = n
maps/Kconfig:275:	  You can say 'Y' to both this and 'MTD_DB1550_BOOT' above, to use
maps/Kconfig:278:config MTD_DILNETPC
maps/Kconfig:280:	depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
maps/Kconfig:286:config MTD_DILNETPC_BOOTSIZE
maps/Kconfig:288:	depends on MTD_DILNETPC
maps/Kconfig:294:config MTD_L440GX
maps/Kconfig:296:	depends on X86 && MTD_JEDECPROBE
maps/Kconfig:303:config MTD_SBC8240
maps/Kconfig:305:	depends on PPC32 && MTD_JEDECPROBE && 6xx && 8260
maps/Kconfig:310:config MTD_TQM8XXL
maps/Kconfig:312:	depends on MTD_CFI && PPC32 && 8xx && TQM8xxL
maps/Kconfig:320:config MTD_RPXLITE
maps/Kconfig:322:	depends on MTD_CFI && PPC32 && 8xx && (RPXCLASSIC || RPXLITE)
maps/Kconfig:330:config MTD_MBX860
maps/Kconfig:332:	depends on MTD_CFI && PPC32 && 8xx && MBX
maps/Kconfig:338:config MTD_DBOX2
maps/Kconfig:340:	depends on PPC32 && 8xx && DBOX2 && MTD_CFI_INTELSTD && MTD_CFI_INTELEXT && MTD_CFI_AMDSTD
maps/Kconfig:346:config MTD_CFI_FLAGADM
maps/Kconfig:348:	depends on PPC32 && 8xx && MTD_CFI
maps/Kconfig:353:config MTD_BEECH
maps/Kconfig:355:	depends on MTD_CFI && PPC32 && 40x && BEECH
maps/Kconfig:361:config MTD_ARCTIC
maps/Kconfig:363:	depends on MTD_CFI && PPC32 && 40x && ARCTIC2
maps/Kconfig:369:config MTD_EBONY
maps/Kconfig:371:	depends on MTD_CFI && PPC32 && 440 && EBONY
maps/Kconfig:377:config MTD_REDWOOD
maps/Kconfig:379:	depends on MTD_CFI && PPC32 && 4xx && 40x && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 )
maps/Kconfig:385:config MTD_CSTM_MIPS_IXX
maps/Kconfig:387:	depends on MIPS && MTD_CFI && MTD_JEDECPROBE && MTD_PARTITIONS
maps/Kconfig:394:	  other boards via setting of the CONFIG_MTD_CSTM_MIPS_IXX_START/
maps/Kconfig:401:config MTD_CSTM_MIPS_IXX_START
maps/Kconfig:403:	depends on MTD_CSTM_MIPS_IXX
maps/Kconfig:411:config MTD_CSTM_MIPS_IXX_LEN
maps/Kconfig:413:	depends on MTD_CSTM_MIPS_IXX
maps/Kconfig:421:config MTD_CSTM_MIPS_IXX_BUSWIDTH
maps/Kconfig:423:	depends on MTD_CSTM_MIPS_IXX
maps/Kconfig:429:config MTD_OCELOT
maps/Kconfig:437:config MTD_SOLUTIONENGINE
maps/Kconfig:439:	depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
maps/Kconfig:444:config MTD_ARM_INTEGRATOR
maps/Kconfig:446:	depends on ARM && MTD_CFI
maps/Kconfig:448:config MTD_CDB89712
maps/Kconfig:450:	depends on ARM && MTD_CFI && ARCH_CDB89712
maps/Kconfig:455:config MTD_SA1100
maps/Kconfig:457:	depends on ARM && MTD_CFI && ARCH_SA1100 && MTD_PARTITIONS
maps/Kconfig:463:config MTD_DC21285
maps/Kconfig:465:	depends on ARM && MTD_CFI && ARCH_FOOTBRIDGE && MTD_COMPLEX_MAPPINGS
maps/Kconfig:471:config MTD_IOP3XX
maps/Kconfig:473:	depends on ARM && MTD_CFI && ARCH_IOP3XX
maps/Kconfig:479:config MTD_IXP4XX
maps/Kconfig:481:	depends on ARM && MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX
maps/Kconfig:488:config MTD_IXP2000
maps/Kconfig:490:	depends on ARM && MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP2000
maps/Kconfig:497:config MTD_EPXA10DB
maps/Kconfig:499:	depends on ARM && MTD_CFI && MTD_PARTITIONS && ARCH_CAMELOT
maps/Kconfig:505:config MTD_FORTUNET
maps/Kconfig:507:	depends on ARM && MTD_CFI && MTD_PARTITIONS && SA1100_FORTUNET
maps/Kconfig:512:config MTD_AUTCPU12
maps/Kconfig:519:config MTD_EDB7312
maps/Kconfig:521:	depends on ARM && MTD_CFI
maps/Kconfig:526:config MTD_IMPA7
maps/Kconfig:528:	depends on ARM && MTD_JEDECPROBE
maps/Kconfig:533:config MTD_CEIVA
maps/Kconfig:535:	depends on ARM && MTD_JEDECPROBE && ARCH_CEIVA
maps/Kconfig:541:config MTD_NOR_TOTO
maps/Kconfig:548:config MTD_H720X
maps/Kconfig:550:	depends on ARM && MTD_CFI && ( ARCH_H7201 || ARCH_H7202 )
maps/Kconfig:555:config MTD_MPC1211
maps/Kconfig:557:	depends on SUPERH && SH_MPC1211 && MTD_CFI
maps/Kconfig:563:config MTD_PCI
maps/Kconfig:565:	depends on MTD && PCI && MTD_COMPLEX_MAPPINGS
maps/Kconfig:573:config MTD_PCMCIA
maps/Kconfig:575:	depends on MTD && PCMCIA && MTD_COMPLEX_MAPPINGS && BROKEN
maps/Kconfig:581:config MTD_UCLINUX
maps/Kconfig:583:	depends on MTD_PARTITIONS && !MMU
maps/Kconfig:587:config MTD_SNAPGEARuC
maps/Kconfig:589:	depends on MTD_PARTITIONS
maps/Kconfig:593:config MTD_CPU16B
maps/Kconfig:595:	depends on MTD_PARTITIONS && SNEHA && CPU16B
maps/Kconfig:601:	depends on MTD_SNAPGEARuC
maps/Kconfig:623:config MTD_WRSBC8260
maps/Kconfig:626:	select MTD_PARTITIONS
maps/Kconfig:627:	select MTD_MAP_BANK_WIDTH_4
maps/Kconfig:628:	select MTD_MAP_BANK_WIDTH_1
maps/Kconfig:629:	select MTD_CFI_I1
maps/Kconfig:630:	select MTD_CFI_I4
maps/Kconfig:636:config MTD_DMV182
maps/Kconfig:639:        select MTD_PARTITIONS
maps/Kconfig:640:	select MTD_MAP_BANK_WIDTH_32
maps/Kconfig:641:	select MTD_CFI_I8
maps/Kconfig:642:	select MTD_CFI_AMDSTD
maps/dilnetpc.c:282:		.mask_flags =	MTD_WRITEABLE,
maps/dilnetpc.c:295:		.mask_flags =	MTD_WRITEABLE,
maps/dilnetpc.c:328:		.size =		CONFIG_MTD_DILNETPC_BOOTSIZE,
maps/dilnetpc.c:333:		.size =		ADNP_WINDOW_SIZE-CONFIG_MTD_DILNETPC_BOOTSIZE-0x20000,
maps/dilnetpc.c:340:		.mask_flags =	MTD_WRITEABLE,
maps/dilnetpc.c:398:			CONFIG_MTD_DILNETPC_BOOTSIZE - 0x20000;
maps/fortunet.c:21:#define MTD_FORTUNET_PK		"MTD FortuNet: "
maps/fortunet.c:97:static int __init MTD_New_Region(char *line)
maps/fortunet.c:104:		printk(MTD_FORTUNET_PK "Bad parameters for MTD Region "
maps/fortunet.c:110:		printk(MTD_FORTUNET_PK "Bad region index of %d only have 0..%u regions\n",
maps/fortunet.c:142:static int __init MTD_New_Partition(char *line)
maps/fortunet.c:149:		printk(MTD_FORTUNET_PK "Bad parameters for MTD Partition "
maps/fortunet.c:155:		printk(MTD_FORTUNET_PK "Bad region index of %d only have 0..%u regions\n",
maps/fortunet.c:161:		printk(MTD_FORTUNET_PK "Out of space for partition in this region\n");
maps/fortunet.c:176:__setup("MTD_Region=", MTD_New_Region);
maps/fortunet.c:177:__setup("MTD_Partition=", MTD_New_Partition);
maps/fortunet.c:180:__setup("MTD_Partion=", MTD_New_Partition);
maps/fortunet.c:189:			printk(MTD_FORTUNET_PK "Region %d is not setup (Setting to default)\n",
maps/fortunet.c:204:			printk(KERN_NOTICE MTD_FORTUNET_PK "%s flash device at physically "
maps/fortunet.c:218:				printk(MTD_FORTUNET_PK "%s flash failed to ioremap!\n",
maps/fortunet.c:224:			printk(KERN_NOTICE MTD_FORTUNET_PK "%s flash is virtually at: %x\n",
maps/fortunet.c:232:				printk(KERN_NOTICE MTD_FORTUNET_PK "Trying alternate bankwidth "
maps/lubbock-flash.c:53:		.mask_flags =	MTD_WRITEABLE  /* force read-only */
maps/pb1xxx-flash.c:38:                .mask_flags   =   MTD_WRITEABLE},
maps/pb1xxx-flash.c:47:                .mask_flags   =   MTD_WRITEABLE},
maps/pb1xxx-flash.c:56:#if defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER)
maps/pb1xxx-flash.c:72:                .mask_flags   =   MTD_WRITEABLE
maps/pb1xxx-flash.c:79:#elif defined(CONFIG_MTD_PB1500_BOOT) && !defined(CONFIG_MTD_PB1500_USER)
maps/pb1xxx-flash.c:91:                .mask_flags   =   MTD_WRITEABLE
maps/pb1xxx-flash.c:98:#elif !defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER)
maps/pb1xxx-flash.c:113:#error MTD_PB1500 define combo error /* should never happen */
maps/iop3xx.c.old:62:		.mask_flags =	MTD_WRITEABLE
mtd_blkdevs.c:368:	if (mtd->type == MTD_ABSENT)
mtd_blkdevs.c:438:	for (i=0; i<MAX_MTD_DEVICES; i++) {
mtd_blkdevs.c:439:		if (mtd_table[i] && mtd_table[i]->type != MTD_ABSENT)
mtdblock.c:30:} *mtdblks[MAX_MTD_DEVICES];
mtdblock.c:71:	ret = MTD_ERASE(mtd, &erase);
mtdblock.c:88:	ret = MTD_WRITE (mtd, pos, len, &retlen, buf);
mtdblock.c:105:	DEBUG(MTD_DEBUG_LEVEL2, "mtdblock: writing cached data for \"%s\" "
mtdblock.c:134:	DEBUG(MTD_DEBUG_LEVEL2, "mtdblock: write on \"%s\" at 0x%lx, size 0x%x\n",
mtdblock.c:138:		return MTD_WRITE (mtd, pos, len, &retlen, buf);
mtdblock.c:170:				ret = MTD_READ(mtd, sect_start, sect_size, &retlen, mtdblk->cache_data);
mtdblock.c:203:	DEBUG(MTD_DEBUG_LEVEL2, "mtdblock: read on \"%s\" at 0x%lx, size 0x%x\n", 
mtdblock.c:207:		return MTD_READ (mtd, pos, len, &retlen, buf);
mtdblock.c:226:			ret = MTD_READ (mtd, pos, size, &retlen, buf);
mtdblock.c:270:	DEBUG(MTD_DEBUG_LEVEL1,"mtdblock_open\n");
mtdblock.c:288:	if ((mtdblk->mtd->flags & MTD_CAP_RAM) != MTD_CAP_RAM &&
mtdblock.c:296:	DEBUG(MTD_DEBUG_LEVEL1, "ok\n");
mtdblock.c:306:   	DEBUG(MTD_DEBUG_LEVEL1, "mtdblock_release\n");
mtdblock.c:320:	DEBUG(MTD_DEBUG_LEVEL1, "ok\n");
mtdblock.c:376:	if (!(mtd->flags & MTD_WRITEABLE))
mtdblock.h:10:#ifndef __MTD_MTDBLOCK_H__
mtdblock.h:11:#define __MTD_MTDBLOCK_H__
mtdblock.h:13:#define MAJOR_NR MTD_BLOCK_MAJOR
mtdblock_ro.c:50:	if ((mtd->flags & (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEABLE)) !=
mtdblock_ro.c:51:	    (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEABLE))
mtdchar.c:26:	devfs_mk_cdev(MKDEV(MTD_CHAR_MAJOR, mtd->index*2),
mtdchar.c:29:	devfs_mk_cdev(MKDEV(MTD_CHAR_MAJOR, mtd->index*2+1),
mtdchar.c:99:	DEBUG(MTD_DEBUG_LEVEL0, "MTD_open\n");
mtdchar.c:101:	if (devnum >= MAX_MTD_DEVICES)
mtdchar.c:113:	if (MTD_ABSENT == mtd->type) {
mtdchar.c:121:	if ((file->f_mode & 2) && !(mtd->flags & MTD_WRITEABLE)) {
mtdchar.c:135:	DEBUG(MTD_DEBUG_LEVEL0, "MTD_close\n");
mtdchar.c:161:	DEBUG(MTD_DEBUG_LEVEL0,"MTD_read\n");
mtdchar.c:181:		ret = MTD_READ(mtd, *ppos, len, &retlen, kbuf);
mtdchar.c:214:	DEBUG(MTD_DEBUG_LEVEL0,"MTD_write\n");
mtdchar.c:278:	DEBUG(MTD_DEBUG_LEVEL0, "MTD_ioctl\n");
mtdchar.c:355:				if (erase->state != MTD_ERASE_DONE &&
mtdchar.c:356:				    erase->state != MTD_ERASE_FAILED)
mtdchar.c:361:				ret = (erase->state == MTD_ERASE_FAILED)?-EIO:0;
mtdchar.c:532:	if (register_chrdev(MTD_CHAR_MAJOR, "mtd", &mtd_fops)) {
mtdchar.c:534:		       MTD_CHAR_MAJOR);
mtdchar.c:545:	unregister_chrdev(MTD_CHAR_MAJOR, "mtd");
mtdconcat.c:37:#define SIZEOF_STRUCT_MTD_CONCAT(num_subdev)	\
mtdconcat.c:103:	if (!(mtd->flags & MTD_WRITEABLE))
mtdconcat.c:122:		if (!(subdev->flags & MTD_WRITEABLE))
mtdconcat.c:208:	if (!(mtd->flags & MTD_WRITEABLE))
mtdconcat.c:227:		if (!(subdev->flags & MTD_WRITEABLE))
mtdconcat.c:308:	if (!(mtd->flags & MTD_WRITEABLE))
mtdconcat.c:327:		if (!(subdev->flags & MTD_WRITEABLE))
mtdconcat.c:378:		if (erase->state != MTD_ERASE_DONE
mtdconcat.c:379:		    && erase->state != MTD_ERASE_FAILED)
mtdconcat.c:384:		err = (erase->state == MTD_ERASE_FAILED) ? -EIO : 0;
mtdconcat.c:397:	if (!(mtd->flags & MTD_WRITEABLE))
mtdconcat.c:494:		if (!(subdev->flags & MTD_WRITEABLE)) {
mtdconcat.c:662:	size = SIZEOF_STRUCT_MTD_CONCAT(num_devs);
mtdconcat.c:705:			 * Expect all flags except MTD_WRITEABLE to be
mtdconcat.c:709:			     flags) & ~MTD_WRITEABLE) {
mtdconcat.c:718:				    subdev[i]->flags & MTD_WRITEABLE;
mtdcore.c:31:struct mtd_info *mtd_table[MAX_MTD_DEVICES];
mtdcore.c:45: *	if the number of present devices exceeds MAX_MTD_DEVICES (i.e. 16)
mtdcore.c:54:	for (i=0; i < MAX_MTD_DEVICES; i++)
mtdcore.c:144:	for (i=0; i< MAX_MTD_DEVICES; i++)
mtdcore.c:169:	for (i=0; i< MAX_MTD_DEVICES; i++)
mtdcore.c:199:		for (i=0; i< MAX_MTD_DEVICES; i++)
mtdcore.c:202:	} else if (num < MAX_MTD_DEVICES) {
mtdcore.c:315:		for (i = 0; ret == 0 && i < MAX_MTD_DEVICES; i++) {
mtdcore.c:319:	} else i = MAX_MTD_DEVICES-1;
mtdcore.c:358:        for (i=0; i< MAX_MTD_DEVICES; i++) {
mtdpart.c:131:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:151:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:167:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:189:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:218:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:243:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:312:	if (!(mtd->flags & MTD_WRITEABLE))
mtdpart.c:489:		if ((slave->mtd.flags & MTD_WRITEABLE) && 
mtdpart.c:493:			slave->mtd.flags &= ~MTD_WRITEABLE;
mtdpart.c:497:		if ((slave->mtd.flags & MTD_WRITEABLE) && 
mtdpart.c:499:			slave->mtd.flags &= ~MTD_WRITEABLE;
nand/nand_bbt.c:159:				 * message to MTD_DEBUG_LEVEL0 */
nand/nand_bbt.c:506:		oobinfo.useecc = MTD_NANDECC_PLACEONLY;
nand/nand_bbt.c:1041:	DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n", 
nand/tx4925ndfmc.c:305:#ifdef CONFIG_MTD_CMDLINE_PARTS
nand/tx4925ndfmc.c:375:#ifdef CONFIG_MTD_CMDLINE_PARTS
nand/tx4925ndfmc.c:385:#else /* ifdef CONFIG_MTD_CMDLINE_PARTS */
nand/tx4925ndfmc.c:397:#endif /* ifdef CONFIG_MTD_CMDLINE_PARTS */
nand/edb7312.c:70:#ifdef CONFIG_MTD_PARTITIONS
nand/edb7312.c:121:#ifdef CONFIG_MTD_PARTITIONS
nand/tx4938ndfmc.c:52:#ifndef CONFIG_MTD_CMDLINE_PARTS
nand/tx4938ndfmc.c:83: 		.mask_flags  = MTD_WRITEABLE	/* This partition is NOT writable */
nand/tx4938ndfmc.c:89: 		.mask_flags  = MTD_WRITEABLE	/* This partition is NOT writable */
nand/tx4938ndfmc.c:292:#ifdef CONFIG_MTD_CMDLINE_PARTS
nand/tx4938ndfmc.c:378:		tx4938ndfmc_mtd->flags &= ~(MTD_WRITEABLE | MTD_ERASEABLE);
nand/tx4938ndfmc.c:381:#ifdef CONFIG_MTD_CMDLINE_PARTS
nand/tx4938ndfmc.c:407:#ifdef CONFIG_MTD_CMDLINE_PARTS
nand/ppchameleonevb.c:44:#define NAND_MTD_NAME		"ppchameleon-nand"
nand/ppchameleonevb.c:45:#define NAND_EVB_MTD_NAME	"ppchameleonevb-nand"
nand/ppchameleonevb.c:83:#ifdef CONFIG_MTD_PARTITIONS
nand/ppchameleonevb.c:185:#ifdef CONFIG_MTD_PARTITIONS
nand/ppchameleonevb.c:284:#ifdef CONFIG_MTD_PARTITIONS
nand/ppchameleonevb.c:386:#ifdef CONFIG_MTD_PARTITIONS
nand/ppchameleonevb.c:387:	ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME;
nand/Makefile:6:obj-$(CONFIG_MTD_NAND)			+= nand.o nand_ecc.o
nand/Makefile:7:obj-$(CONFIG_MTD_NAND_IDS)		+= nand_ids.o
nand/Makefile:9:obj-$(CONFIG_MTD_NAND_SPIA)		+= spia.o
nand/Makefile:10:obj-$(CONFIG_MTD_NAND_TOTO)		+= toto.o
nand/Makefile:11:obj-$(CONFIG_MTD_NAND_AUTCPU12)		+= autcpu12.o
nand/Makefile:12:obj-$(CONFIG_MTD_NAND_EDB7312)		+= edb7312.o
nand/Makefile:13:obj-$(CONFIG_MTD_NAND_TX4925NDFMC)	+= tx4925ndfmc.o
nand/Makefile:14:obj-$(CONFIG_MTD_NAND_TX4938NDFMC)	+= tx4938ndfmc.o
nand/Makefile:15:obj-$(CONFIG_MTD_NAND_AU1550)		+= au1550nd.o
nand/Makefile:16:obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB)	+= ppchameleonevb.o
nand/Makefile:17:obj-$(CONFIG_MTD_NAND_DISKONCHIP)	+= diskonchip.o
nand/Kconfig:7:config MTD_NAND
nand/Kconfig:15:config MTD_NAND_VERIFY_WRITE
nand/Kconfig:17:	depends on MTD_NAND
nand/Kconfig:25:config MTD_NAND_AUTCPU12
nand/Kconfig:27:	depends on ARM && MTD_NAND && ARCH_AUTCPU12
nand/Kconfig:32:config MTD_NAND_EDB7312
nand/Kconfig:34:	depends on ARM && MTD_NAND && ARCH_EDB7312
nand/Kconfig:39:config MTD_NAND_SPIA
nand/Kconfig:41:	depends on ARM && ARCH_P720T && MTD_NAND
nand/Kconfig:45:config MTD_NAND_TOTO
nand/Kconfig:47:	depends on ARM && ARCH_OMAP && MTD_NAND
nand/Kconfig:51:config MTD_NAND_IDS
nand/Kconfig:53:	default y if MTD_NAND = y || MTD_DOC2000 = y || MTD_DOC2001 = y || MTD_DOC2001PLUS = y
nand/Kconfig:54:	default m if MTD_NAND = m || MTD_DOC2000 = m || MTD_DOC2001 = m || MTD_DOC2001PLUS = m
nand/Kconfig:56:config MTD_NAND_TX4925NDFMC
nand/Kconfig:58:	depends on TOSHIBA_RBTX4925 && MTD_NAND && TOSHIBA_RBTX4925_MPLEX_NAND
nand/Kconfig:63:config MTD_NAND_TX4938NDFMC
nand/Kconfig:65:	depends on TOSHIBA_RBTX4938 && MTD_NAND && TOSHIBA_RBTX4938_MPLEX_NAND 
nand/Kconfig:70:config MTD_NAND_AU1550
nand/Kconfig:72:	depends on SOC_AU1550 && MTD_NAND
nand/Kconfig:77:config MTD_NAND_PPCHAMELEONEVB
nand/Kconfig:79:	depends on PPCHAMELEONEVB && MTD_NAND
nand/Kconfig:83:config MTD_NAND_DISKONCHIP
nand/Kconfig:85:	depends on MTD_NAND && EXPERIMENTAL
nand/Kconfig:93:config MTD_NAND_DISKONCHIP_PROBE_ADVANCED
nand/Kconfig:95:        depends on MTD_NAND_DISKONCHIP
nand/Kconfig:102:config MTD_NAND_DISKONCHIP_PROBE_ADDRESS
nand/Kconfig:103:        hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED
nand/Kconfig:104:        depends on MTD_NAND_DISKONCHIP
nand/Kconfig:119:config MTD_NAND_DISKONCHIP_PROBE_HIGH
nand/Kconfig:121:        depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED
nand/Kconfig:129:config MTD_NAND_DISKONCHIP_BBTWRITE
nand/Kconfig:131:	depends on MTD_NAND_DISKONCHIP
nand/diskonchip.c:31:#ifndef CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS
nand/diskonchip.c:32:#define CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS 0
nand/diskonchip.c:37:#ifdef CONFIG_MTD_DISKONCHIP_PROBE_HIGH
nand/diskonchip.c:43:#else /*  CONFIG_MTD_DOCPROBE_HIGH */
nand/diskonchip.c:49:#endif /*  CONFIG_MTD_DOCPROBE_HIGH */
nand/diskonchip.c:110:#ifdef MTD_NAND_DISKONCHIP_BBTWRITE
nand/diskonchip.c:117:static unsigned long doc_config_location = CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS;
nand/diskonchip.c:935:        .useecc = MTD_NANDECC_AUTOPLACE,
nand/diskonchip.c:1010://#ifdef CONFIG_MTD_DEBUG_VERBOSE
nand/diskonchip.c:1011://	if (CONFIG_MTD_DEBUG_VERBOSE >= 2)
nand/diskonchip.c:1121://#ifdef CONFIG_MTD_DEBUG_VERBOSE
nand/diskonchip.c:1122://	if (CONFIG_MTD_DEBUG_VERBOSE >= 2)
nand/diskonchip.c:1166://#ifdef CONFIG_MTD_DEBUG_VERBOSE
nand/diskonchip.c:1167://		if (CONFIG_MTD_DEBUG_VERBOSE >= 2)
nand/diskonchip.c:1243:#ifdef CONFIG_MTD_PARTITIONS
nand/diskonchip.c:1303:#ifdef CONFIG_MTD_PARTITIONS
nand/nand_base.c:35: *	Check, if mtd->ecctype should be set to MTD_ECC_HW
nand/nand_base.c:61:#ifdef CONFIG_MTD_PARTITIONS
nand/nand_base.c:67:	.useecc = MTD_NANDECC_AUTOPLACE,
nand/nand_base.c:74:	.useecc = MTD_NANDECC_AUTOPLACE,
nand/nand_base.c:81:	.useecc = MTD_NANDECC_AUTOPLACE,
nand/nand_base.c:127:#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
nand/nand_base.c:876:			DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
nand/nand_base.c:887:#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
nand/nand_base.c:924:				DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
nand/nand_base.c:932:				DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
nand/nand_base.c:943:				DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
nand/nand_base.c:950:			if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
nand/nand_base.c:956:						DEBUG (MTD_DEBUG_LEVEL0,
nand/nand_base.c:1044:	DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
nand/nand_base.c:1048:		DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
nand/nand_base.c:1061:	if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
nand/nand_base.c:1131:		if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE)
nand/nand_base.c:1172:						DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " 
nand/nand_base.c:1209:			if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) { 
nand/nand_base.c:1215:				DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
nand/nand_base.c:1225:			case MTD_NANDECC_AUTOPLACE:
nand/nand_base.c:1235:			case MTD_NANDECC_PLACE:
nand/nand_base.c:1311:	DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
nand/nand_base.c:1325:		DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
nand/nand_base.c:1411:		DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
nand/nand_base.c:1549:	DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
nand/nand_base.c:1556:		DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
nand/nand_base.c:1583:	if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
nand/nand_base.c:1614:			DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
nand/nand_base.c:1638:				DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
nand/nand_base.c:1668:		DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
nand/nand_base.c:1693:	DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
nand/nand_base.c:1707:		DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
nand/nand_base.c:1754:		DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
nand/nand_base.c:1761:#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
nand/nand_base.c:1766:		DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
nand/nand_base.c:1825:	DEBUG (MTD_DEBUG_LEVEL3,
nand/nand_base.c:1830:		DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
nand/nand_base.c:1857:	if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
nand/nand_base.c:2020:	DEBUG (MTD_DEBUG_LEVEL3,
nand/nand_base.c:2025:		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
nand/nand_base.c:2031:		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
nand/nand_base.c:2037:		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
nand/nand_base.c:2059:		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
nand/nand_base.c:2060:		instr->state = MTD_ERASE_FAILED;
nand/nand_base.c:2067:	instr->state = MTD_ERASING;
nand/nand_base.c:2073:			instr->state = MTD_ERASE_FAILED;
nand/nand_base.c:2088:			DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
nand/nand_base.c:2089:			instr->state = MTD_ERASE_FAILED;
nand/nand_base.c:2105:	instr->state = MTD_ERASE_DONE;
nand/nand_base.c:2109:	ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
nand/nand_base.c:2132:	DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
nand/nand_base.c:2518:	mtd->type = MTD_NANDFLASH;
nand/nand_base.c:2519:	mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
nand/nand_base.c:2520:	mtd->ecctype = MTD_ECC_SW;
nand/nand_base.c:2558:#ifdef CONFIG_MTD_PARTITIONS
nftlcore.c:46:	if (mtd->type != MTD_NANDFLASH)
nftlcore.c:59:	DEBUG(MTD_DEBUG_LEVEL1, "NFTL: add_mtd for %s\n", mtd->name);
nftlcore.c:74:	nftl->oobinfo.useecc = MTD_NANDECC_PLACEONLY;
nftlcore.c:133:	DEBUG(MTD_DEBUG_LEVEL1, "NFTL: remove_dev (i=%d)\n", dev->devnum);
nftlcore.c:160:		DEBUG(MTD_DEBUG_LEVEL1, "NFTL_findfreeblock: there are too few free EUNs\n");
nftlcore.c:224:			MTD_READOOB(nftl->mbd.mtd,
nftlcore.c:230:                                        DEBUG(MTD_DEBUG_LEVEL1, 
nftlcore.c:296:				DEBUG(MTD_DEBUG_LEVEL1, "Setting inplace to 0. VUC %d, "
nftlcore.c:312:			DEBUG(MTD_DEBUG_LEVEL1, "Pending write not free in EUN %d. "
nftlcore.c:319:		DEBUG(MTD_DEBUG_LEVEL1, "Cannot fold Virtual Unit Chain %d in place. "
nftlcore.c:341:            MTD_WRITEOOB(nftl->mbd.mtd, (nftl->EraseSize * targetEUN) + 2 * 512 + 8, 
nftlcore.c:349:	DEBUG(MTD_DEBUG_LEVEL1,"Folding chain %d into unit %d\n", thisVUC, targetEUN);
nftlcore.c:365:                ret = MTD_READ(nftl->mbd.mtd, (nftl->EraseSize * BlockMap[block]) + (block * 512),
nftlcore.c:368:                    ret = MTD_READ(nftl->mbd.mtd, (nftl->EraseSize * BlockMap[block])
nftlcore.c:376:                MTD_WRITEECC(nftl->mbd.mtd, (nftl->EraseSize * targetEUN) + (block * 512),
nftlcore.c:385:        MTD_WRITEOOB(nftl->mbd.mtd, (nftl->EraseSize * targetEUN) + 8, 
nftlcore.c:396:	DEBUG(MTD_DEBUG_LEVEL1,"Want to erase\n");
nftlcore.c:504:			MTD_READOOB(nftl->mbd.mtd, (writeEUN * nftl->EraseSize) + blockofs,
nftlcore.c:507:			DEBUG(MTD_DEBUG_LEVEL2, "Status of block %d in EUN %d is %x\n",
nftlcore.c:560:				DEBUG(MTD_DEBUG_LEVEL1, "Using desperate==1 to find free EUN to accommodate write to VUC %d\n", thisVUC);
nftlcore.c:592:		MTD_READOOB(nftl->mbd.mtd, writeEUN * nftl->EraseSize + 8, 8,
nftlcore.c:597:		MTD_WRITEOOB(nftl->mbd.mtd, writeEUN * nftl->EraseSize + 8, 8,
nftlcore.c:607:			MTD_READOOB(nftl->mbd.mtd, (lastEUN * nftl->EraseSize) + 8,
nftlcore.c:613:			MTD_WRITEOOB(nftl->mbd.mtd, (lastEUN * nftl->EraseSize) + 8,
nftlcore.c:646:	MTD_WRITEECC(nftl->mbd.mtd, (writeEUN * nftl->EraseSize) + blockofs,
nftlcore.c:670:			if (MTD_READOOB(nftl->mbd.mtd, (thisEUN * nftl->EraseSize) + blockofs,
nftlcore.c:710:		if (MTD_READ(nftl->mbd.mtd, ptr, 512, &retlen, buffer))
nftlmount.c:69:		ret = MTD_READ(nftl->mbd.mtd, block * nftl->EraseSize, SECTORSIZE, &retlen, buf);
nftlmount.c:94:		if ((ret = MTD_READOOB(nftl->mbd.mtd, block * nftl->EraseSize + SECTORSIZE + 8,
nftlmount.c:113:		if ((ret = MTD_READECC(nftl->mbd.mtd, block * nftl->EraseSize, SECTORSIZE,
nftlmount.c:232:				if ((ret = MTD_READECC(nftl->mbd.mtd, block * nftl->EraseSize +
nftlmount.c:277:		if (MTD_READECC(nftl->mbd.mtd, address, SECTORSIZE, &retlen, buf, &buf[SECTORSIZE], &nftl->oobinfo) < 0)
nftlmount.c:307:	if (MTD_READOOB(nftl->mbd.mtd, block * nftl->EraseSize + SECTORSIZE + 8,
nftlmount.c:324:	MTD_ERASE(nftl->mbd.mtd, instr);
nftlmount.c:326:	if (instr->state == MTD_ERASE_FAILED) {
nftlmount.c:346:		if (MTD_WRITEOOB(nftl->mbd.mtd, block * nftl->EraseSize + SECTORSIZE + 8, 8,
nftlmount.c:377:			if (MTD_READOOB(nftl->mbd.mtd, block * nftl->EraseSize + i * SECTORSIZE,
nftlmount.c:397:					MTD_WRITEOOB(nftl->mbd.mtd,
nftlmount.c:489:	if (MTD_READOOB(nftl->mbd.mtd, block * nftl->EraseSize + SECTORSIZE + 8, 8, 
nftlmount.c:504:		if (MTD_WRITEOOB(nftl->mbd.mtd, block * nftl->EraseSize + SECTORSIZE + 8, 8, 
nftlmount.c:516:			if (MTD_READOOB(nftl->mbd.mtd, block * nftl->EraseSize + i,
nftlmount.c:546:	if (MTD_READOOB(nftl->mbd.mtd, block * nftl->EraseSize + 2 * SECTORSIZE + 8,
nftlmount.c:585:				if (MTD_READOOB(s->mbd.mtd, block * s->EraseSize + 8, 8, 
nftlmount.c:587:				    MTD_READOOB(s->mbd.mtd, block * s->EraseSize + SECTORSIZE + 8, 8, 
redboot.c:53:#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
redboot.c:119:#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
redboot.c:142:#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
redboot.c:151:#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
redboot.c:165:#ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY
redboot.c:169:			parts[i].mask_flags = MTD_WRITEABLE;
redboot.c:174:#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
